%%% -*-BibTeX-*-
%%% ====================================================================
%%% BibTeX-file{
%%% author = "Nelson H. F. Beebe",
%%% version = "0.12",
%%% date = "10 July 2008",
%%% time = "14:24:36 MDT",
%%% filename = "hot-chips.bib",
%%% address = "University of Utah
%%% Department of Mathematics, 110 LCB
%%% 155 S 1400 E RM 233
%%% Salt Lake City, UT 84112-0090
%%% USA",
%%% telephone = "+1 801 581 5254",
%%% FAX = "+1 801 581 4148",
%%% URL = "http://www.math.utah.edu/~beebe",
%%% checksum = "31056 5623 22508 227416",
%%% email = "beebe at math.utah.edu, beebe at acm.org,
%%% beebe at computer.org (Internet)",
%%% codetable = "ISO/ASCII",
%%% keywords = "bibliography; BibTeX; Hot Chips Symposia",
%%% license = "public domain",
%%% supported = "yes",
%%% docstring = "This is a bibliography of presentations from
%%% the annual IEEE Hot Chips symposia
%%% (1989--date).
%%%
%%% The conferences have a Web site at
%%%
%%% http://www.hotchips.org/
%%%
%%% with the NN'th home page at
%%%
%%% http://www.hotchips.org/hcNN
%%%
%%% For hc19 (Summer 2007), the Web site
%%% offers copies of tutorials, presentations,
%%% and vides.
%%%
%%% Archives of slides of conference talks are at
%%%
%%% http://www.hotchips.org/archives/
%%%
%%% According to editorials in IEEE Micro, these
%%% symposia do not have formal proceedings, but
%%% selected papers are expected to be published
%%% in IEEE Micro in spring issues following each
%%% Hot Chips symposium.
%%%
%%% At least since 1996, the conference Web site
%%% preserves the slides from most of the talks,
%%% using in PDF form, and URLs for them are
%%% included in the BibTeX entries below.
%%%
%%% I cannot find library catalog entries for any
%%% of these symposia, and the IEEE Web sites at
%%%
%%% http://shop.ieee.org/store/
%%% http://ieeexplore.ieee.org/
%%%
%%% do not contain entries for them; this bears out
%%% the editorial statements noted above.
%%%
%%% It may be that Hot Chips will continue to be
%%% an unpublished symposium with talks about
%%% work-in-progress, with the expectation that
%%% full papers will appear elsewhere later,
%%% perhaps in IEEE Micro.
%%%
%%% Nevertheless, since a lot of important new
%%% work has appeared in these conferences, it
%%% seems worthwhile for historical purposes to
%%% record bibliographic entries, even if formal
%%% publication perhaps appears elsewhere much
%%% later. Such entries will be included
%%% whenever they can be identified.
%%%
%%% At version 0.12, the year coverage looked
%%% like this:
%%%
%%% 1990 ( 14) 1997 ( 32) 2004 ( 7)
%%% 1991 ( 6) 1998 ( 38) 2005 ( 7)
%%% 1992 ( 3) 1999 ( 43) 2006 ( 19)
%%% 1993 ( 5) 2000 ( 41) 2007 ( 3)
%%% 1994 ( 5) 2001 ( 7) 2008 ( 6)
%%% 1995 ( 28) 2002 ( 7)
%%% 1996 ( 38) 2003 ( 8)
%%%
%%% Article: 85
%%% InProceedings: 195
%%% Misc: 20
%%% Proceedings: 17
%%%
%%% Total entries: 317
%%%
%%% Database and library catalog coverage of
%%% these conferences is rather sparse. Limited
%%% data was found in the OCLC WorldCat and
%%% Proceedings databases, and programs and
%%% sometimes, presentation slides, for papers
%%% from the Hot Chips 11 and 12 conferences
%%% (1999 and 2000) were found at
%%% http://www.hotchips.org/. However, the Hot
%%% Chips 11 program is incomplete there; it
%%% incorrectly continues into the Hot Chips 12
%%% program.
%%%
%%% Many of the titles given in the conference
%%% programs disagree with those in the actual
%%% online articles; in such cases, the BibTeX
%%% entry includes an alttitle value from the
%%% program, with the title value taken from the
%%% article text. Also, a fair number of
%%% conference program titles lack online article
%%% text.
%%%
%%% Numerous errors in the sources noted above
%%% have been corrected. Spelling has been
%%% verified with the UNIX spell and GNU ispell
%%% programs using the exception dictionary
%%% stored in the companion file with extension
%%% .sok.
%%%
%%% BibTeX citation tags are uniformly chosen
%%% as name:year:abbrev, where name is the
%%% family name of the first author or editor,
%%% year is a 4-digit number, and abbrev is a
%%% 3-letter condensation of important title
%%% words. Citation tags were automatically
%%% generated by software developed for the
%%% BibNet Project.
%%%
%%% In this bibliography, entries are sorted in
%%% publication order, using ``bibsort -byyear''.
%%%
%%% The checksum field above contains a CRC-16
%%% checksum as the first value, followed by the
%%% equivalent of the standard UNIX wc (word
%%% count) utility output of lines, words, and
%%% characters. This is produced by Robert
%%% Solovay's checksum utility.",
%%% }
%%% ====================================================================
%%% ====================================================================
%%% Acknowledgement abbreviations:
@String{ack-nhfb = "Nelson H. F. Beebe,
University of Utah,
Department of Mathematics, 110 LCB,
155 S 1400 E RM 233,
Salt Lake City, UT 84112-0090, USA,
Tel: +1 801 581 5254,
FAX: +1 801 581 4148,
e-mail: \path|beebe@math.utah.edu|,
\path|beebe@acm.org|,
\path|beebe@computer.org| (Internet),
URL: \path|http://www.math.utah.edu/~beebe/|"}
%%% ====================================================================
%%% Journal abbreviations:
@String{j-IEEE-MICRO = "IEEE Micro"}
%%% ====================================================================
%%% Publisher abbreviations:
@String{pub-IEEE = "IEEE Computer Society Press"}
@String{pub-IEEE:adr = "1109 Spring Street, Suite 300, Silver
Spring, MD 20910, USA"}
%%% ====================================================================
%%% Bibliography entries:
@Article{Alsup:1990:MFA,
author = "Mitch Alsup",
title = "{Motorola}'s 88000 Family Architecture",
journal = j-IEEE-MICRO,
volume = "10",
number = "3",
pages = "48--66",
month = jun,
year = "1990",
CODEN = "IEMIDZ",
ISSN = "0272-1732",
bibdate = "Thu Dec 14 06:08:58 MST 2000",
bibsource = "Compendex database;
garbo.uwasa.fi:/pc/doc-soft/fpbiblio.txt; Science
Citation Index database (1980--2000);
ftp://ftp.math.utah.edu/pub/tex/bib/ieeemicro.bib",
abstract = "A new generation of architectures emphasizes
performance by means of pipelined data paths, cache
memories, and optimizing compilers.",
acknowledgement = ack-nj # " and " # ack-nhfb,
affiliation = "Motorola Inc, Austin, TX, USA",
classcodes = "B1265F (Microprocessors and microcomputers); C5130
(Microprocessor chips); C5230 (Digital arithmetic
methods)",
classification = "722; 723",
conference = "First Annual Hot Chips Symposium",
corpsource = "Motorola Inc., Austin, TX, USA",
keywords = "32 bit; 88100 processor; 88200; Boolean Predicates;
cache and memory management unit; Cache Memories;
Computer Architecture; Computer Systems,
Digital--Pipeline Processing; Computers, Microcomputer;
data read and write requests; Data Storage, Digital;
Data Transfer Instructions; digital arithmetic;
instruction fetch; instructions; integer; Integer
Instructions; Microcomputer Architecture;
microprocessor chips; Motorola's 88000 Family;
Motorola's 88000 family architecture; requests",
meetingabr = "First Annu Hot Chips Symp",
meetingaddress = "Palo Alto, CA, USA",
meetingdate = "Jun 26--27 1989",
meetingdate2 = "06/26--27/89",
sponsor = "IEEE Computer Soc, Palo Alto, CA, USA",
treatment = "P Practical",
}
@Article{Birman:1990:DWS,
author = "Mark Birman and Allen Samuels and George Chu and Ting
Chuk and Larry Hu and John McLeod and John Barnes",
title = "Developing the {WTL3170\slash 3171 Sparc}
Floating-Point Coprocessors",
journal = j-IEEE-MICRO,
volume = "10",
number = "1",
pages = "55--64",
month = feb,
year = "1990",
CODEN = "IEMIDZ",
ISSN = "0272-1732",
bibdate = "Thu Dec 14 06:08:58 MST 2000",
bibsource = "Compendex database;
garbo.uwasa.fi:/pc/doc-soft/fpbiblio.txt; Science
Citation Index database (1980--2000);
ftp://ftp.math.utah.edu/pub/tex/bib/ieeemicro.bib",
abstract = "Contending with dual floating-point interfaces at both
25 and 40 MHz posed an extraordinary challenge in
coprocessor development.",
acknowledgement = ack-nj # " and " # ack-nhfb,
affiliation = "Weitek Corp, Sunnyvale, CA, USA",
classcodes = "B1265F (Microprocessors and microcomputers); C5130
(Microprocessor chips); C5230 (Digital arithmetic
methods)",
classification = "721; 722; 723",
conference = "First Annual Hot Chips Symposium",
corpsource = "Weitek Corp., Sunnyvale, CA, USA",
keywords = "64-b ALU; bus organization; Circuits; Computer
Architecture; Computer Interfaces; Computers,
Microcomputer; digital arithmetic; divide/square-root;
Divide/Square-Root Unit; floating-point; Floating-Point
Adder; floating-point controller functions;
Floating-Point Multiplier; integer; microprocessor
chips; multiplier; register files; Sparc Floating-Point
Coprocessors; system behavioral-level modeling; unit;
units; WTL3170/3171 Sparc floating-point coprocessors",
meetingabr = "First Annu Hot Chips Symp",
meetingaddress = "Palo Alto, CA, USA",
meetingdate = "Jun 26--27 1989",
meetingdate2 = "06/26--27/89",
sponsor = "IEEE Computer Soc, Palo Alto, CA, USA",
treatment = "P Practical",
}
@Article{Brown:1990:ISE,
author = "Emil W. Brown and Anant Agrawal and Trevor Creary and
Michael F. Klein and David Murata and Joseph Petolino",
title = "Implementing {Sparc} in {ECL}",
journal = j-IEEE-MICRO,
volume = "10",
number = "1",
pages = "10--22",
month = feb,
year = "1990",
CODEN = "IEMIDZ",
ISSN = "0272-1732",
bibdate = "Thu Dec 14 06:08:58 MST 2000",
bibsource = "Compendex database; Science Citation Index database
(1980--2000);
ftp://ftp.math.utah.edu/pub/tex/bib/ieeemicro.bib",
abstract = "Two companies successfully joined - forces to design a
small, low-cost system capables of large mainframe
performance.",
acknowledgement = ack-nhfb,
affiliation = "Sun Microsystems Inc, USA",
classcodes = "B1265F (Microprocessors and microcomputers); B2570B
(Bipolar integrated circuits); C5130 (Microprocessor
chips); C5220 (Computer architecture)",
classification = "714; 721; 722; 723",
conference = "First Annual Hot Chips Symposium",
corpsource = "Sun Microsyst. Inc., Mountain View, CA, USA",
keywords = "B5000 Microprocessor; bipolar emitter-; bipolar
integrated circuits; Cache Design; computer
architecture; Computer Interfaces; Computers,
Microcomputer; coprocessor interface; coupled logic;
ECL; ecl Inverter; emitter-; Integer Unit Pipeline;
integer unit pipeline; Integrated Circuits, VLSI; Logic
Circuits, Emitter Coupled; microprocessor chips; RISC
Architecture; scalable processor architecture; Scalable
Processor Architecture (Sparc); signals; Sparc; system
interface; Transistors, Bipolar",
meetingabr = "First Annu Hot Chips Symp",
meetingaddress = "Palo Alto, CA, USA",
meetingdate = "Jun 26--27 1989",
meetingdate2 = "06/26--27/89",
sponsor = "IEEE Computer Soc, Palo Alto, CA, USA",
treatment = "P Practical",
xxauthor = "E. W. Brown and A. Agrawal and T. Creary and M. F.
Klein and D. Murata and J. Petolino",
}
@Article{Crawford:1990:ICE,
author = "John H. Crawford",
title = "The {i486 CPU}: executing instructions in one clock
cycle",
journal = j-IEEE-MICRO,
volume = "10",
number = "1",
pages = "27--36",
month = feb,
year = "1990",
CODEN = "IEMIDZ",
ISSN = "0272-1732",
bibdate = "Thu Dec 14 06:08:58 MST 2000",
bibsource = "Compendex database; Science Citation Index database
(1980--2000);
ftp://ftp.math.utah.edu/pub/tex/bib/ieeemicro.bib",
abstract = "A cache integrated into the instruction pipeline lets
this 386-compatible processor achieve minicomputer
performance levels.",
acknowledgement = ack-nhfb,
affiliation = "Intel Corp, Santa Clara, CA, USA",
classcodes = "B1265F (Microprocessors and microcomputers); C5130
(Microprocessor chips)",
classification = "722; 723",
conference = "First Annual Hot Chips Symposium",
corpsource = "Intel Corp., Santa Clara, CA, USA",
keywords = "binary compatibility; cache; Computer Operating
Systems; Computer Systems, Digital--Pipeline
Processing; Computers, Microcomputer; coprocessor; Data
Storage, Digital; executing instructions; Hardware
Compatibility; I486 cpu; i486 CPU; Instruction
Pipeline; instruction pipeline; math; microprocessor
chips; minicomputer performance levels; On-Chip Cache",
meetingabr = "First Annu Hot Chips Symp",
meetingaddress = "Palo Alto, CA, USA",
meetingdate = "Jun 26--27 1989",
meetingdate2 = "06/26--27/89",
sponsor = "IEEE Computer Soc, Palo Alto, CA, USA",
treatment = "P Practical",
}
@Article{Darley:1990:TFP,
author = "Merrick Darley and Bill Kronlage and David Bural and
Bob Churchill and David Pulling and Paul Wang and Rick
Iwamoto and Larry Yang",
title = "The {TMS390C602A} Floating-Point Coprocessor for
{Sparc} Systems",
journal = j-IEEE-MICRO,
volume = "10",
number = "3",
pages = "36--47",
month = jun,
year = "1990",
CODEN = "IEMIDZ",
ISSN = "0272-1732",
bibdate = "Thu Dec 14 06:08:58 MST 2000",
bibsource = "Compendex database;
garbo.uwasa.fi:/pc/doc-soft/fpbiblio.txt; Science
Citation Index database (1980--2000);
ftp://ftp.math.utah.edu/pub/tex/bib/ieeemicro.bib",
abstract = "A recent Sparc (scalable processor architecture)
processor consists of a two-chip configuration,
containing the TMS390C601 integer unit (IU) and the
TMS390C602A floating-point unit (FPU). The second
device, an innovative coprocessor that lets the
processor execute single- or double-precision
floating-point instructions concurrently with IU
operations is described. Dedicated floating-point
hardware in the FPU increases the performance of the
system. Running at clock periods as small as 20 ns, the
chip should deliver 5.5 million double-precision
floating-point operations per second under the Linpack
benchmark (50-MHz clock rate). The FPU provides single-
and double-precision arithmetic functions: addition,
subtraction, multiplication, division, square root,
compare, and convert. To minimize its math unit's
latency, the FPU uses a highly parallel architecture
requiring separate math units to optimize additions and
multiplications. Traps stop the execution of a program
to jump to software routine for handling data-dependent
errors or to execute instructions not implemented in
the hardware. Benchmark results are presented. (4
Refs.)",
acknowledgement = ack-nj # " and " # ack-nhfb,
affiliation = "Texas Instruments Inc, Dallas, TX, USA",
classcodes = "B1265F (Microprocessors and microcomputers); C5130
(Microprocessor chips); C5230 (Digital arithmetic
methods)",
classification = "B1265F (Microprocessors and microcomputers); C5130
(Microprocessor chips); C5230 (Digital arithmetic
methods); 721; 722; 723",
conference = "First Annual Hot Chips Symposium",
corpsource = "Texas Instrum. Inc., Dallas, TX, USA",
keywords = "TMS390C602A floating-point coprocessor; Sparc systems;
Two-chip configuration; TMS390C601 integer unit;
TMS390C602A floating-point unit; Linpack benchmark;
Addition; Subtraction; Multiplication; Division; Square
root; Compare; Convert; addition; chip configuration;
compare; Computer Architecture--Reduced Instruction Set
Computing; Computer Systems, Digital--Parallel
Processing; convert; digital arithmetic; division;
Floating-Point Coprocessor; floating-point unit; Highly
Parallel Architecture; Linpack benchmark;
Microprocessor Chips; microprocessor chips;
multiplication; Multiplier Data Path; Sparc Systems;
Sparc systems; square root; subtraction; TMS390C601
integer unit; TMS390C602A; TMS390C602A floating-point
coprocessor; two-",
meetingabr = "First Annu Hot Chips Symp",
meetingaddress = "Palo Alto, CA, USA",
meetingdate = "Jun 26--27 1989",
meetingdate2 = "06/26--27/89",
sponsor = "IEEE Computer Soc, Palo Alto, CA, USA",
thesaurus = "Digital arithmetic; Microprocessor chips",
treatment = "P Practical",
}
@Article{Edenfield:1990:PPD,
author = "Robin W. Edenfield and Michael G. Gallup and William
B. {Ledbetter, Jr.} and Ralph C. McGarity and Eric E.
Quintana and Russell A. Reininger",
title = "The 68040 Processor: Part {I}, Design and
Implementation",
journal = j-IEEE-MICRO,
volume = "10",
number = "1",
pages = "66--78",
month = feb,
year = "1990",
CODEN = "IEMIDZ",
ISSN = "0272-1732",
bibdate = "Thu Dec 14 06:08:58 MST 2000",
bibsource = "Compendex database;
garbo.uwasa.fi:/pc/doc-soft/fpbiblio.txt; Science
Citation Index database (1980--2000);
ftp://ftp.math.utah.edu/pub/tex/bib/ieeemicro.bib",
abstract = "In the first of a two-partner series, the design team
explains its total approach and the workings of the
integer and floating-point units.",
acknowledgement = ack-nj # " and " # ack-nhfb,
classcodes = "B1265F (Microprocessors and microcomputers); C5130
(Microprocessor chips)",
classification = "722; 723",
conference = "First Annual Hot Chips Symposium",
corpsource = "Motorola, Austin, TX, USA",
keywords = "32 bit; 68040 processor; address-translation caches;
autonomous bus controller; Computer Architecture;
Computer Operating Systems; Computer Systems,
Digital--Pipeline Processing; Computers, Microcomputer;
Data Caches; Data Storage, Digital--Virtual;
demand-paged; family; floating-point coprocessor
instruction sets; full-32-b microprocessor; internal
memory controllers; memory management; Microprocessor
Chips; microprocessor chips; Motorola 68000; Motorola
68040; operating system; Pipelined
Integer/Floating-Point Units",
meetingabr = "First Annu Hot Chips Symp",
meetingaddress = "Palo Alto, CA, USA",
meetingdate = "Jun 26--27 1989",
meetingdate2 = "06/26--27/89",
sponsor = "IEEE Computer Soc, Palo Alto, CA, USA",
treatment = "P Practical",
}
@Article{Edenfield:1990:PPM,
author = "Robin W. Edenfield and Michael G. Gallup and William
B. {Ledbetter, Jr.} and Ralph C. McGarity and Eric E.
Quintana and Russel A. Reininger",
title = "The 68040 Processor: Part 2, Memory Design and Chip
Verification",
journal = j-IEEE-MICRO,
volume = "10",
number = "3",
pages = "22--35",
month = jun,
year = "1990",
CODEN = "IEMIDZ",
ISSN = "0272-1732",
bibdate = "Thu Dec 14 06:08:58 MST 2000",
bibsource = "Science Citation Index database (1980--2000);
Compendex database;
ftp://ftp.math.utah.edu/pub/tex/bib/ieeemicro.bib",
abstract = "An address-translation cache features a 4- or 8-Kbyte
selectable page size while translation registers
provide transparent mapping of segments up to 4
Gbytes.",
acknowledgement = ack-nhfb,
affiliation = "Motorola Inc, Austin, TX, USA",
classcodes = "B1265F (Microprocessors and microcomputers); C5130
(Microprocessor chips); C5210 (Logic design methods)",
classification = "714; 722; 723",
conference = "First Annual Hot Chips Symposium",
corpsource = "Motorola Inc., Austin, TX, USA",
keywords = "32 bit; arbitration; Cache Memories; chip
verification; Computer Architecture; Computer
Interfaces; Computers, Microcomputer; Data Buses; Data
Storage, Digital--Design; Dedicated Test Logic;
external bus; external bus protocol; External Bus
Protocol; IEEE 1149.1 standard; internal caches; logic
testing; management; memory; memory design; memory
subsystem; microprocessor chips; Microprocessor
Chips--Testing; Motorola 68000 Family; Motorola 68040
processor; Random Logic; snooping; storage management;
timing specifications",
meetingabr = "First Annu Hot Chips Symp",
meetingaddress = "Palo Alto, CA, USA",
meetingdate = "Jun 26--27 1989",
meetingdate2 = "06/26--27/89",
sponsor = "IEEE Computer Soc, Palo Alto, CA, USA",
treatment = "P Practical",
}
@Article{James:1990:MBE,
author = "David V. James",
title = "Multiplexed Buses --- The Endian Wars Continue",
journal = j-IEEE-MICRO,
volume = "10",
number = "3",
pages = "9--21",
month = jun,
year = "1990",
CODEN = "IEMIDZ",
ISSN = "0272-1732",
bibdate = "Thu Dec 14 06:08:58 MST 2000",
bibsource = "Compendex database; Science Citation Index database
(1980--2000);
ftp://ftp.math.utah.edu/pub/tex/bib/ieeemicro.bib",
abstract = "The processing order of bytes can differ within a
processor and so can the transmitting order between
nodes on a bus. Adding it all up produces superior bus
designs.",
acknowledgement = ack-nhfb,
affiliation = "Apple Computer, Cupertino, CA, USA",
classcodes = "C5610S (System buses)",
classification = "722; 723",
conference = "First Annual Hot Chips Symposium",
keywords = "big-endian; Bus Standards; Computer Architecture;
Computer Interfaces; computer interfaces;
Computers--Data Communication Systems; data exchange;
endian order; little-endian; Mad; mad-; multiplexed
address-data bus; Multiplexed Buses; multiplexed buses;
Multiplexed Parallel Buses; Multiplexing; processors;
Sad; sad-endian order; Serialized Buses",
meetingabr = "First Annu Hot Chips Symp",
meetingaddress = "Palo Alto, CA, USA",
meetingdate = "Jun 26--27 1989",
meetingdate2 = "06/26--27/89",
sponsor = "IEEE Computer Soc, Palo Alto, CA, USA",
treatment = "P Practical",
}
@Article{Johnson:1990:HCS,
author = "Stephen C. Johnson",
title = "Hot Chips and Soggy Software: {RISC} success springs
partially from good system design. Take note and
eliminate the software bottleneck from your new
design",
journal = j-IEEE-MICRO,
volume = "10",
number = "1",
pages = "23--26",
month = feb,
year = "1990",
CODEN = "IEMIDZ",
ISSN = "0272-1732",
bibdate = "Thu Dec 14 06:08:58 MST 2000",
bibsource = "Compendex database; Science Citation Index database
(1980--2000);
ftp://ftp.math.utah.edu/pub/tex/bib/ieeemicro.bib",
acknowledgement = ack-nhfb,
affiliation = "Stardent Computer Corp, Sunnyvale, CA, USA",
classcodes = "C5220 (Computer architecture); C6110B (Software
engineering techniques)",
classification = "722; 723",
conference = "First Annual Hot Chips Symposium",
corpsource = "Stardent Comput. Corp., Sunnyvale, CA, USA",
keywords = "bottlenecks; Computer Architecture; Computer Software;
computer system; development; Microprocessor
Chips--Design; performance; Reduced Instruction Set
Computing; reduced instruction set computing; RISC;
RISC Architecture; software; software engineering;
Software Productivity; standardization",
meetingabr = "First Annu Hot Chips Symp",
meetingaddress = "Palo Alto, CA, USA",
meetingdate = "Jun 26--27 1989",
meetingdate2 = "06/26--27/89",
sponsor = "IEEE Computer Soc, Palo Alto, CA, USA",
treatment = "P Practical",
}
@Article{Kitahara:1990:GBM,
author = "Takeshi Kitahara and Taizo Satoh",
title = "The {Gmicro\slash 300 32-Bit} Microprocessor",
journal = j-IEEE-MICRO,
volume = "10",
number = "3",
pages = "68--75",
month = jun,
year = "1990",
CODEN = "IEMIDZ",
ISSN = "0272-1732",
bibdate = "Thu Dec 14 06:08:58 MST 2000",
bibsource = "Compendex database; Science Citation Index database
(1980--2000);
ftp://ftp.math.utah.edu/pub/tex/bib/ieeemicro.bib",
abstract = "Executing an instruction with a memory operand and a
register operand in one clock cycle presents no problem
for this TRON-architecture chip.",
acknowledgement = ack-nhfb,
affiliation = "Fujitsu Ltd, Kawasaki, Jpn",
classcodes = "B1265F (Microprocessors and microcomputers); C5130
(Microprocessor chips)",
classification = "722; 723",
conference = "First Annual Hot Chips Symposium",
corpsource = "Fujitsu Ltd., Kawasaki, Japan",
keywords = "32 bit; cache; Computer Architecture; Computer
Systems, Digital--Pipeline Processing; Computers,
Microcomputer; Gmicro/300 32-Bit Microprocessor;
Gmicro/300 32-bit microprocessor; Internal Caches;
internal caches; memories; memory operand;
Microcomputer Instructions; microprocessor chips;
one-cycle structures; register operand; specification;
TRON Architecture",
meetingabr = "First Annu Hot Chips Symp",
meetingaddress = "Palo Alto, CA, USA",
meetingdate = "Jun 26--27 1989",
meetingdate2 = "06/26--27/89",
sponsor = "IEEE Computer Soc, Palo Alto, CA, USA",
treatment = "P Practical",
}
@Article{Pennello:1990:CCR,
author = "Thomas J. Pennello",
title = "Compiler Challenges with {RISCs}",
journal = j-IEEE-MICRO,
volume = "10",
number = "1",
pages = "37--43",
month = feb,
year = "1990",
CODEN = "IEMIDZ",
ISSN = "0272-1732",
bibdate = "Thu Dec 14 06:08:58 MST 2000",
bibsource = "Compendex database; Science Citation Index database
(1980--2000);
ftp://ftp.math.utah.edu/pub/tex/bib/ieeemicro.bib",
abstract = "RISCs may possess simplified instruction sets, but
don't be fooled. Crafting their compilers is not so
simple.",
acknowledgement = ack-nhfb,
affiliation = "MetaWare Inc, Santa Cruz, CA, USA",
classcodes = "C5220 (Computer architecture); C6150C (Compilers,
interpreters and other processors)",
classification = "722; 723",
conference = "First Annual Hot Chips Symposium",
corpsource = "MetaWare Inc., Santa Cruz, CA, USA",
keywords = "Argument Passing Scheme; Argument Placement; C
Programming Language; calling sequence; compilers;
complex-instruction-set computers; Computer
Architecture--Reduced Instruction Set Computing;
Computer Operating Systems; Computer Programming
Languages--C; Computer Programming--Macros; i860; IBM
RT PC; Intel; Program Compilers; program compilers;
reduced instruction set computing; RISC Compilers; RISC
Processors; RISCs; varargs; Varargs Functions;
variable-arguments",
meetingabr = "First Annu Hot Chips Symp",
meetingaddress = "Palo Alto, CA, USA",
meetingdate = "Jun 26--27 1989",
sponsor = "IEEE Computer Soc, Palo Alto, CA, USA",
treatment = "P Practical",
}
@Article{Priem:1990:DGG,
author = "Curtis R. Priem",
title = "Developing the {GX} graphics accelerator
architecture",
journal = j-IEEE-MICRO,
volume = "10",
number = "1",
pages = "44--54",
month = feb,
year = "1990",
CODEN = "IEMIDZ",
ISSN = "0272-1732",
bibdate = "Thu Dec 14 06:08:58 MST 2000",
bibsource = "Compendex database; Science Citation Index database
(1980--2000);
ftp://ftp.math.utah.edu/pub/tex/bib/ieeemicro.bib",
abstract = "High-level graphics on entry-level workstations become
practical with this new approach to acceleration.",
acknowledgement = ack-nhfb,
affiliation = "Sun Microsystems Inc, Mountain View, CA, USA",
classcodes = "C5220 (Computer architecture); C5540 (Terminals and
graphic displays)",
classification = "722; 723",
conference = "First Annual Hot Chips Symposium",
corpsource = "Sun Microsyst. Inc., Mountain View, CA, USA",
keywords = "arbitrary; ASICs; Computer Architecture; computer
architecture; computer graphic equipment; Computer
Graphics; Computer Peripheral Equipment--Graphics;
controller; frame buffer chip; geometric primitive; gx
Graphics Accelerator Architecture; GX graphics
accelerator architecture; hardwired graphics functions;
Image Flat Shading; Image Processing; intelligent;
Intelligent dma Controller; Interactive; Object
Tesselation; quadrilateral",
meetingabr = "First Annu Hot Chips Symp",
meetingaddress = "Palo Alto, CA, USA",
meetingdate = "Jun 26--27 1989",
meetingdate2 = "06/26--27/89",
sponsor = "IEEE Computer Soc, Palo Alto, CA, USA",
treatment = "P Practical",
}
@Article{Hill:1991:GEI,
author = "Mark D. Hill and David A. Wood",
title = "{Guest Editors}' Introduction: Hot Chips {II}
Symposium",
journal = j-IEEE-MICRO,
volume = "11",
number = "3",
pages = "8--9",
month = jun,
year = "1991",
CODEN = "IEMIDZ",
ISSN = "0272-1732",
bibdate = "Thu Dec 14 06:08:58 MST 2000",
bibsource = "Science Citation Index database (1980--2000);
ftp://ftp.math.utah.edu/pub/tex/bib/ieeemicro.bib",
acknowledgement = ack-nhfb,
}
@Article{Oehler:1991:IRS,
author = "Richard R. Oehler and Michael W. Blasgen",
title = "{IBM RISC System\slash 6000}: architecture and
performance",
journal = j-IEEE-MICRO,
volume = "11",
number = "3",
pages = "14--17, 56--62",
month = jun,
year = "1991",
CODEN = "IEMIDZ",
ISSN = "0272-1732",
bibdate = "Thu Dec 14 06:08:58 MST 2000",
bibsource = "Science Citation Index database (1980--2000)",
abstract = "Emphasizing high-performance, floating-point design
with superscalar microprocessing",
acknowledgement = ack-nhfb,
classcodes = "B1265F (Microprocessors and microcomputers); C5130
(Microprocessor chips); C5470 (Performance evaluation
and testing); C5220 (Computer architecture)",
corpsource = "IBM Thomas J. Watson Res. Center, Yorktown Heights,
NY, USA",
keywords = "architecture; branch; cache management; fixed-;
floating-point; IBM computers; IBM RISC System/6000;
instruction set; microprocessor; microprocessor chips;
parallel architectures; performance; performance
evaluation; point; reduced instruction set computing;
superscalar",
treatment = "P Practical",
}
@Article{Peterson:1991:IML,
author = "Craig Peterson and James Sutton and Paul Wiley",
title = "{Iwarp} --- {A} {100-Mops}, {LIW} Microprocessor for
Multicomputers",
journal = j-IEEE-MICRO,
volume = "11",
number = "3",
pages = "26--29, 81--87",
month = jun,
year = "1991",
CODEN = "IEMIDZ",
ISSN = "0272-1732",
bibdate = "Thu Dec 14 06:08:58 MST 2000",
bibsource = "Science Citation Index database (1980--2000)",
abstract = "Extending the limits of general parallel computing by
combining computational power and communication
flexibility in one architecture",
acknowledgement = ack-nhfb,
classcodes = "B1265F (Microprocessors and microcomputers); B2570
(Semiconductor integrated circuits); C5130
(Microprocessor chips); C5220 (Computer architecture);
C5440 (Multiprocessor systems and techniques)",
corpsource = "Intel Corp., Hillsboro, OR, USA",
keywords = "architecture; communication agent; computation agent;
development environment; iWarp; LIW microprocessor;
machines; message-based communication model;
message-passing; microprocessor; microprocessor chips;
multicomputers; parallel; parallel architectures;
register file; software; systolic communications; VLSI;
VLSI component; word-level communication",
treatment = "P Practical",
}
@Article{Popescu:1991:MA,
author = "Val Popescu and Merle Schultz and John Spracklen and
Gary Gibson and Bruce Lightner and David Isaman",
title = "The {Metaflow} Architecture",
journal = j-IEEE-MICRO,
volume = "11",
number = "3",
pages = "10--13, 63--73",
month = jun,
year = "1991",
CODEN = "IEMIDZ",
ISSN = "0272-1732",
bibdate = "Thu Dec 14 06:08:58 MST 2000",
bibsource = "Science Citation Index database (1980--2000)",
abstract = "Enhancing superscalar performance with out-of-order
execution and multilevel speculative execution of
instructions",
acknowledgement = ack-nhfb,
classcodes = "C5220 (Computer architecture)",
corpsource = "Metaflow Technol. Inc., San Diego, CA, USA",
keywords = "deferred-scheduling; DRIS; instruction-level
parallelism; Lightning; Metaflow architecture;
microprocessors; out-of-order execution; parallel
architectures; performance; register-renaming
instruction shelf; Sparc RISC instruction set;
speculative-execution; superpipelined; superscalar",
treatment = "P Practical",
}
@Article{Sachs:1991:DIT,
author = "Howard G. Sachs and Harlan McGhan and Lee F. Hanson
and Nathan A. Brookwood",
title = "Design and implementation trade-offs in the {Clipper
C400} architecture",
journal = j-IEEE-MICRO,
volume = "11",
number = "3",
pages = "18--21, 74--80",
month = jun,
year = "1991",
CODEN = "IEMIDZ",
ISSN = "0272-1732",
bibdate = "Thu Dec 14 06:08:58 MST 2000",
bibsource = "Science Citation Index database (1980--2000)",
abstract = "Pursuing maximum functionality and cost-effectiveness
in a complete redesign",
acknowledgement = ack-nhfb,
classcodes = "B1265F (Microprocessors and microcomputers); C5130
(Microprocessor chips); C5220 (Computer architecture)",
corpsource = "Intergraph Corp., Palo Alto, CA, USA",
keywords = "architecture; circuit; Clipper C400 architecture;
clock; cycle; design; execution pipelines;
floating-point unit design; hardware implementations;
integer unit design; load/store pipeline;
microprocessor chips; model; multichip implementation;
performance; programming; reduced instruction set
computing; reduced instruction-set computing;
superpipelining; superscalar operation",
treatment = "P Practical",
}
@Article{Schmidt:1991:DSC,
author = "Ulrich Schmidt and Knut Caesar",
title = "{Datawave} --- {A} Single-Chip Multiprocessor for
Video Applications",
journal = j-IEEE-MICRO,
volume = "11",
number = "3",
pages = "22--25, 88--94",
month = jun,
year = "1991",
CODEN = "IEMIDZ",
ISSN = "0272-1732",
bibdate = "Thu Dec 14 06:08:58 MST 2000",
bibsource = "Science Citation Index database (1980--2000)",
abstract = "Replacing hardwired logic with freely programmable
processors",
acknowledgement = ack-nhfb,
classcodes = "B6430 (Television equipment, systems and
applications); B1265F (Microprocessors and
microcomputers); B6220 (Stations and subscriber
equipment); C5440 (Multiprocessor systems and
techniques); C5130 (Microprocessor chips); C5260
(Digital signal processing); C5220 (Computer
architecture)",
corpsource = "ITT Intermetall, Freiburg, Germany",
keywords = "architecture; array; asynchronous dataflows; cellular
architecture; codecs; data-driven system; dataflow
programming; Datawave processor; digital signal
processing chips; filter; fine-; finite impulse
response filer; FIR; four-tap; grained MIMD;
multiple-data; multiple-instruction; multiprocessing;
parallel architectures; parallel processing; processor;
program development tools; real-time image codec;
self-; single-chip multiprocessor; statically scheduled
dataflow programs; submicron technology; systems; timed
hardware mechanisms; video applications; video
equipment",
treatment = "P Practical; R Product Review",
}
@Article{Dally:1992:MDP,
author = "William J. Dally and J. A. {Stuart Fiske} and John S.
Keen and Richard A. Lethin and Michael D. Noakes and
Peter R. Nuth and Roy E. Davison and Gregory A. Fyler",
title = "The Message-Driven Processor --- {A} Multicomputer
Processing Node with Efficient Mechanisms",
journal = j-IEEE-MICRO,
volume = "12",
number = "2",
pages = "23--39",
month = apr,
year = "1992",
CODEN = "IEMIDZ",
ISSN = "0272-1732",
bibdate = "Thu Dec 14 06:08:58 MST 2000",
bibsource = "Parallel/Par.Arch.Indep.bib; Compendex database;
Science Citation Index database (1980--2000)",
note = "Presented at Hot Chips III, Stanford University,
1992.",
abstract = "Featuring efficient mechanisms for communication,
synchronization, and naming",
acknowledgement = ack-nhfb,
classcodes = "C5130 (Microprocessor chips)",
classification = "722; 723",
corpsource = "Artificial Intelligence Lab., MIT, Cambridge, MA,
USA",
keywords = "36 bit; 4096-; Address Arithmetic Unit; Computer
Systems, Digital; Computer Systems, Digital ---
Parallel Processing; Computers, Microcomputer;
Concurrent Smalltalk; instruction set architecture;
Integrated Circuits, VLSI; J-Machine; MDP;
Message-Driven Processor; message-driven processor;
microprocessor chips; Multiprocessing; multiprocessing
systems; network architecture; system architecture;
Task Scheduling; VLSI microcomputer; word",
treatment = "P Practical",
}
@Article{Jouppi:1992:HCI,
author = "Norman P. Jouppi",
title = "{Hot Chips-III} --- Introduction",
journal = j-IEEE-MICRO,
volume = "12",
number = "2",
pages = "8--9",
month = apr,
year = "1992",
CODEN = "IEMIDZ",
ISSN = "0272-1732",
bibdate = "Thu Dec 14 06:08:58 MST 2000",
bibsource = "Science Citation Index database (1980--2000)",
acknowledgement = ack-nhfb,
}
@Article{Mirapuri:1992:MRP,
author = "Sunil Mirapuri and Michael Woodacre and Nader
Vasseghi",
title = "The {MIPS R4000} Processor",
journal = j-IEEE-MICRO,
volume = "12",
number = "2",
pages = "10--22",
month = apr,
year = "1992",
CODEN = "IEMIDZ",
ISSN = "0272-1732",
bibdate = "Thu Dec 14 06:08:58 MST 2000",
bibsource = "Compiler/Compiler.Lins.bib; Compendex database;
Science Citation Index database (1980--2000)",
note = "Presented at Hot Chips III, Stanford University,
1992.",
abstract = "Offering solutions for the increasing demands on
address space",
acknowledgement = ack-nhfb,
classcodes = "C5130 (Microprocessor chips); C5220P (Parallel
architecture)",
classification = "714; 722; 723",
corpsource = "MIPS Comput. Syst., Sunnyvale, CA, USA",
keywords = "64 bits; benchmark tests; Computer Architecture;
Computer Systems, Digital --- Pipeline Processing;
Computers, Microcomputer; Electronics Packaging;
Floating-Point Unit; Integer Data Path; Integrated
Circuits, CMOS; Memory Management Unit; microprocessor
chips; MIPS processors; Primary Cache; R4000; Reduced
Instruction Set Computing; reduced instruction set
computing; RISC microprocessor; RISC Processor;
Secondary Cache; superpipelining",
treatment = "P Practical; R Product Review",
}
@InProceedings{Anonymous:1993:DAA,
author = "Anonymous",
title = "{DECchip21066} --- {Alpha AXP} Architecture processor
for low-cost applications",
crossref = "IEEE:1993:HCV",
pages = "??--??",
year = "1993",
bibdate = "Mon Jan 08 05:08:39 2001",
acknowledgement = ack-nhfb,
}
@InProceedings{Anonymous:1993:HIW,
author = "Anonymous",
title = "A highly-integrated workstation graphics system",
crossref = "IEEE:1993:HCV",
pages = "??--??",
year = "1993",
bibdate = "Mon Jan 08 05:11:50 2001",
acknowledgement = ack-nhfb,
}
@InProceedings{Anonymous:1993:MBE,
author = "Anonymous",
title = "A {300 MHz 115W 32b} bipolar {ECL} microprocessor",
crossref = "IEEE:1993:HCV",
pages = "??--??",
year = "1993",
bibdate = "Mon Jan 08 05:12:31 2001",
acknowledgement = ack-nhfb,
}
@InProceedings{Anonymous:1993:MMP,
author = "Anonymous",
title = "{MasPar MP-2 PE} chip: a totally cool hot chip",
crossref = "IEEE:1993:HCV",
pages = "??--??",
year = "1993",
bibdate = "Mon Jan 08 05:13:31 2001",
acknowledgement = ack-nhfb,
}
@InProceedings{Anonymous:1994:HPL,
author = "Anonymous",
title = "A high performance, low power, {Pentium} processor",
crossref = "IEEE:1994:HCV",
pages = "??--??",
year = "1994",
bibdate = "Mon Jan 08 05:28:04 2001",
acknowledgement = ack-nhfb,
}
@InProceedings{Anonymous:1994:PRM,
author = "Anonymous",
title = "Power{PC} 604 {RISC} microprocessor",
crossref = "IEEE:1994:HCV",
pages = "??--??",
year = "1994",
bibdate = "Mon Jan 08 05:28:04 2001",
acknowledgement = ack-nhfb,
}
@InProceedings{Anonymous:1994:SUL,
author = "Anonymous",
title = "{Stanford} ultra low power {CMOS}",
crossref = "IEEE:1994:HCV",
pages = "??--??",
year = "1994",
bibdate = "Mon Jan 08 05:28:04 2001",
acknowledgement = ack-nhfb,
}
@InProceedings{Orup:1994:SCM,
author = "Holger Orup",
title = "A {100Kbit/s} Single Chip Modular Exponentiation
Processor",
crossref = "IEEE:1994:HCV",
pages = "53--59",
year = "1994",
bibdate = "Mon Jan 08 10:51:06 2001",
bibsource = "Theory/arith.bib",
acknowledgement = ack-nhfb,
}
@InProceedings{Ahi:1995:RSM,
author = "A. Ahi and A. Bomdica and G. Shippen and H. Sucar",
title = "{R10000} Superscalar Microprocessor",
crossref = "IEEE:1995:HCV",
pages = "227--238",
year = "1995",
bibdate = "Sat Jan 6 19:21:12 MST 2001",
bibsource = "OCLC Proceedings database",
URL = "ftp://ftp.sgi.com/sgi/doc/R10000/hotchips/hotchips.ps;
ftp://ftp.sgi.com/sgi/doc/R10000/hotchips/hotchips_talk.ps",
acknowledgement = ack-nhfb,
altauthor = "Ali Ahi and Yung-Chin Chen and Robert Conrad and
Randal Martin and Ratan Ramchandani and Mahdi
Seddighnezhad and Greg Shippen and Hong-men Su and
Hector Sucar and Nader Vasseghi and William {Voegtli,
Jr.} and Kenneth Yeager and Yeffi",
}
@Article{Alpert:1995:GEI,
author = "Donald Alpert and Alan Jay Smith",
title = "{Guest Editors}' Introduction: {Hot Chips VI}",
journal = j-IEEE-MICRO,
volume = "15",
number = "2",
pages = "8--9",
month = apr,
year = "1995",
CODEN = "IEMIDZ",
ISSN = "0272-1732",
bibdate = "Thu Dec 14 06:08:58 MST 2000",
bibsource = "Science Citation Index database (1980--2000)",
acknowledgement = ack-nhfb,
}
@InProceedings{Amarisinghe:1995:HCF,
author = "S. P. Amarisinghe and J. A. M. Anderson and R. S.
French and M. W. Hall",
title = "Hot Compilers for Future Hot Chips",
crossref = "IEEE:1995:HCV",
pages = "167--178",
year = "1995",
bibdate = "Sat Jan 6 19:21:12 MST 2001",
bibsource = "OCLC Proceedings database",
acknowledgement = ack-nhfb,
}
@InProceedings{Asanovic:1995:VM,
author = "K. Asanovic and J. Beck and B. Irissou and B. E. D.
Kingsbury",
title = "The {TO} Vector Microprocessor",
crossref = "IEEE:1995:HCV",
pages = "187--196",
year = "1995",
bibdate = "Sat Jan 6 19:21:12 MST 2001",
bibsource = "OCLC Proceedings database",
acknowledgement = ack-nhfb,
}
@InProceedings{Awaga:1995:GPC,
author = "M. Awaga",
title = "{$3$D} Graphics Processor Chip Set",
crossref = "IEEE:1995:HCV",
pages = "121--134",
year = "1995",
bibdate = "Sat Jan 6 19:21:12 MST 2001",
bibsource = "OCLC Proceedings database",
acknowledgement = ack-nhfb,
}
@InProceedings{Balser:1995:SFC,
author = "D. Balser",
title = "Smaller, Faster, Cooler \ldots{} Evolving the
{PowerPC} Family",
crossref = "IEEE:1995:HCV",
pages = "217--226",
year = "1995",
bibdate = "Sat Jan 6 19:21:12 MST 2001",
bibsource = "OCLC Proceedings database",
acknowledgement = ack-nhfb,
}
@InProceedings{Cheng:1995:FHR,
author = "J. M. Cheng and L. M. Duyanovich",
title = "Fast and Highly Reliable {IBMLZ1} Compression Chip and
Algorithm for Storage",
crossref = "IEEE:1995:HCV",
pages = "143--154",
year = "1995",
bibdate = "Sat Jan 6 19:21:12 MST 2001",
bibsource = "OCLC Proceedings database",
acknowledgement = ack-nhfb,
}
@InProceedings{Christie:1995:AKM,
author = "D. Christie",
title = "{AMD-K5} Microprocessor",
crossref = "IEEE:1995:HCV",
pages = "41--48",
year = "1995",
bibdate = "Sat Jan 6 19:21:12 MST 2001",
bibsource = "OCLC Proceedings database",
acknowledgement = ack-nhfb,
}
@Article{Circello:1995:SAM,
author = "Joe Circello and Greg Edgington and Dan McCarthy and
James Gay and David Schimke and Steven Sullivan and
Richard Duerden and Chris Hinds and Danny Marquette and
Lal Sood and Al Crouch and Daniel Chow",
title = "The Superscalar Architecture of the {MC68060}",
journal = j-IEEE-MICRO,
volume = "15",
number = "2",
pages = "10--21",
month = apr,
year = "1995",
CODEN = "IEMIDZ",
ISSN = "0272-1732",
bibdate = "Thu Dec 14 06:08:58 MST 2000",
bibsource = "Compendex database; Science Citation Index database
(1980--2000)",
note = "Presented at Hot Chips VI, Stanford University, CA,
August 14--16, 1994.",
acknowledgement = ack-nhfb,
affiliation = "Motorola",
affiliationaddress = "Phoenix, AZ, USA",
classcodes = "B1265F (Microprocessors and microcomputers); C5130
(Microprocessor chips); C5220P (Parallel
architecture)",
classification = "714.2; 721.2; 721.3; 722.2; 722.4",
corpsource = "Motorola Inc., Phoenix, AZ, USA",
keywords = "66 MHz; CMOS integrated circuits; Computer
architecture; Cost effectiveness; Data address
translation caches; Digital arithmetic; Dual integer
execution units; Dual operand execution pipelines;
Embedded processing applications; features; Flip flop
circuits; high-; Logic design; MC68060 microprocessor;
microarchitectural; Microarchitectural features;
Microcomputers; Microprocessor chips; microprocessor
chips; Performance; performance embedded processing;
performance objectives; pipeline processing; Pipeline
processing systems; Single floating point execution
units; Superscalar architecture; superscalar
architecture; superscalar pipeline implementation;
Transistors; User code compatibility; User interfaces",
treatment = "P Practical",
}
@InProceedings{Cobb:1995:MCS,
author = "P. Cobb and J. Cesana",
title = "The {MiniRISC CW4010}: {A} Superscalar {MIPS}
Processor {ASIC} Core",
crossref = "IEEE:1995:HCV",
pages = "19--30",
year = "1995",
bibdate = "Sat Jan 6 19:21:12 MST 2001",
bibsource = "OCLC Proceedings database",
acknowledgement = ack-nhfb,
}
@Article{Edmondson:1995:SIE,
author = "John H. Edmondson and Paul Rubinfeld and Ronald
Preston and Vidya Rajagopalan",
title = "Superscalar instruction execution in the {21164 Alpha}
microprocessor",
journal = j-IEEE-MICRO,
volume = "15",
number = "2",
pages = "33--43",
month = apr,
year = "1995",
CODEN = "IEMIDZ",
ISSN = "0272-1732",
bibdate = "Thu Dec 14 06:08:58 MST 2000",
bibsource = "Compendex database; Science Citation Index database
(1980--2000)",
note = "Presented at Hot Chips VI, Stanford University, CA,
August 14--16, 1994.",
acknowledgement = ack-nhfb,
affiliation = "Digital Equipment Corp",
affiliationaddress = "Hudson, MA, USA",
classcodes = "B1265F (Microprocessors and microcomputers); B2570D
(CMOS integrated circuits); C5130 (Microprocessor
chips)",
classification = "714.2; 721.1; 721.3; 722.1; 722.2; 722.4",
corpsource = "Digital Equipment Corp., Hudson, MA, USA",
keywords = "0.5; 21164 Alpha; 300 MHz; Algorithms; Buffer storage;
Cache control/bus interface; Central processing units;
chips; CMOS chip; CMOS integrated circuits; CMOS
integrated circuits; Computer architecture; Data
storage equipment; Digital arithmetic; Fourway
superscalar instruction; High clock rate; high clock
rate; high-throughput/nonblocking memory systems;
instruction sets; latency; low operational; Low
operational latency; micron; microprocessor;
Microprocessor chips; Nonblocking memory systems;
Parallel processing systems; Performance; Pipeline
processing systems; Superscalar alpha microprocessor;
Superscalar instruction execution; superscalar
instruction execution; Transistors; User interfaces",
treatment = "P Practical",
}
@InProceedings{Essen:1995:PES,
author = "A. Essen and S. Goldstein",
title = "Performance Evaluation of the Superscalar Speculative
Execution {HaL SPARC64} Processor",
crossref = "IEEE:1995:HCV",
pages = "59--74",
year = "1995",
bibdate = "Sat Jan 6 19:21:12 MST 2001",
bibsource = "OCLC Proceedings database",
acknowledgement = ack-nhfb,
}
@InProceedings{Fandrianto:1995:SCV,
author = "J. Fandrianto and B. Martin",
title = "A Single Chip Video {CD} with Hi-Fi Audio for Consumer
Applications",
crossref = "IEEE:1995:HCV",
pages = "135--142",
year = "1995",
bibdate = "Sat Jan 6 19:21:12 MST 2001",
bibsource = "OCLC Proceedings database",
acknowledgement = ack-nhfb,
}
@InProceedings{Garibay:1995:BBB,
author = "T. Garibay",
title = "Building a Better Beast: Native vs. {RISC}-like vs.
{VLIW} Methods of Implementing {x86} Microprocessors",
crossref = "IEEE:1995:HCV",
pages = "49--58",
year = "1995",
bibdate = "Sat Jan 6 19:21:12 MST 2001",
bibsource = "OCLC Proceedings database",
acknowledgement = ack-nhfb,
}
@InProceedings{Kondo:1995:TCR,
author = "T. Kondo and K. Suguri and M. Ikeda and T. Abe",
title = "A Two-Chip Real-Time {MPEG2} Video Encoder with Wide
Range Motion Estimation",
crossref = "IEEE:1995:HCV",
pages = "95--102",
year = "1995",
bibdate = "Sat Jan 6 19:21:12 MST 2001",
bibsource = "OCLC Proceedings database",
acknowledgement = ack-nhfb,
}
@Article{Lee:1995:AME,
author = "Ruby B. Lee",
title = "Accelerating multimedia with enhanced
microprocessors",
journal = j-IEEE-MICRO,
volume = "15",
number = "2",
pages = "22--32",
month = apr,
year = "1995",
CODEN = "IEMIDZ",
ISSN = "0272-1732",
bibdate = "Thu Dec 14 06:08:58 MST 2000",
bibsource = "Compendex database; Science Citation Index database
(1980--2000)",
note = "Presented at Hot Chips VI, Stanford University, CA,
August 14--16, 1994.",
acknowledgement = ack-nhfb,
affiliation = "Hewlett-Packard",
affiliationaddress = "Cupertino, CA, USA",
classcodes = "B1265F (Microprocessors and microcomputers); C5130
(Microprocessor chips); C6130M (Multimedia)",
classification = "714.2; 716.4; 721.3; 722.4; 723.1; 723.2",
corpsource = "Hewlett-Packard Co., Cupertino, CA, USA",
keywords = "Audio systems; Computer software; Computer
workstations; Decoding; Decompression; decompression;
enhanced microprocessors; entry-level workstation;
instructions; Intrinsic signal processing;
Microprocessor chips; microprocessor chips;
minimalistic set; Moving pictures expert group; MPEG
video and audio; multimedia acceleration; Multimedia
instructions; Multimedia processing; multimedia
programs; multimedia systems; Native signal processing;
Optimization; PA-RISC microprocessors; Parallel
processing systems; parallel subword; Parallel subword
instructions; parallelism; Pipeline processing systems;
Playback; Real time systems; Reduced instruction set
computing; Software video decoder; software video
decoder; SUID-MIMD; Video signal processing",
treatment = "A Application; P Practical",
}
@InProceedings{McMinn:1995:FSF,
author = "B. McMinn",
title = "The First Superscalar {29K} Family Member",
crossref = "IEEE:1995:HCV",
pages = "1--10",
year = "1995",
bibdate = "Sat Jan 6 19:21:12 MST 2001",
bibsource = "OCLC Proceedings database",
acknowledgement = ack-nhfb,
}
@InProceedings{Naas:1995:MPF,
author = "B. Naas",
title = "Memory Performance Features of the 64-bit {PA-8000}",
crossref = "IEEE:1995:HCV",
pages = "87--94",
year = "1995",
bibdate = "Sat Jan 6 19:21:12 MST 2001",
bibsource = "OCLC Proceedings database",
acknowledgement = ack-nhfb,
}
@InProceedings{Nemirovsky:1995:ANI,
author = "M. D. Nemirovsky",
title = "The Architecture of the {NS486} Integrated Processor",
crossref = "IEEE:1995:HCV",
pages = "11--18",
year = "1995",
bibdate = "Sat Jan 6 19:21:12 MST 2001",
bibsource = "OCLC Proceedings database",
acknowledgement = ack-nhfb,
}
@InProceedings{Ngai:1995:VAF,
author = "A. Ngai",
title = "{VLSI} Architecture of the {I}-Frame Encoder for the
{MPEG-2} Video Compression",
crossref = "IEEE:1995:HCV",
pages = "103--110",
year = "1995",
bibdate = "Sat Jan 6 19:21:12 MST 2001",
bibsource = "OCLC Proceedings database",
acknowledgement = ack-nhfb,
}
@InProceedings{Nowatzyk:1995:SMC,
author = "A. Nowatzyk and G. Aybay and M. Browne and B. Radke",
title = "{Scylla}: {A} Memory Controller with Integrated
Protocol Engines for Distributed Shared Memory
Support",
crossref = "IEEE:1995:HCV",
pages = "179--186",
year = "1995",
bibdate = "Sat Jan 6 19:21:12 MST 2001",
bibsource = "OCLC Proceedings database",
acknowledgement = ack-nhfb,
}
@InProceedings{Papworth:1995:OPP,
author = "D. Papworth",
title = "Optimizing the {P6} Pipeline",
crossref = "IEEE:1995:HCV",
pages = "31--40",
year = "1995",
bibdate = "Sat Jan 6 19:21:12 MST 2001",
bibsource = "OCLC Proceedings database",
acknowledgement = ack-nhfb,
}
@InProceedings{Saito:1995:MSR,
author = "K. Saito and M. Hashimoto and K. Matsubara and H.
Sawamoto",
title = "A {150 MHz} Superscalar {RISC} Processor with Pseudo
Vector Processing Feature",
crossref = "IEEE:1995:HCV",
pages = "197--206",
year = "1995",
bibdate = "Sat Jan 6 19:21:12 MST 2001",
bibsource = "OCLC Proceedings database",
acknowledgement = ack-nhfb,
}
@InProceedings{Shen:1995:SHS,
author = "G. W. Shen",
title = "{SPARC64}+: {HAL}'s Second Generation 64-bit {SPARC}
Processor",
crossref = "IEEE:1995:HCV",
pages = "75--86",
year = "1995",
bibdate = "Sat Jan 6 19:21:12 MST 2001",
bibsource = "OCLC Proceedings database",
acknowledgement = ack-nhfb,
}
@InProceedings{Stearns:1995:SSC,
author = "C. Stearns",
title = "{S3} Single Chip {MPEG-1} Audio\slash Video Decoder",
crossref = "IEEE:1995:HCV",
pages = "111--120",
year = "1995",
bibdate = "Sat Jan 6 19:21:12 MST 2001",
bibsource = "OCLC Proceedings database",
acknowledgement = ack-nhfb,
}
@InProceedings{Tremblay:1995:UBS,
author = "U. Tremblay",
title = "{UltraSPARC-I}: {A} 64-bit Superscalar Processor with
Multimedia Support",
crossref = "IEEE:1995:HCV",
pages = "207--216",
year = "1995",
bibdate = "Sat Jan 6 19:21:12 MST 2001",
bibsource = "OCLC Proceedings database",
acknowledgement = ack-nhfb,
}
@Article{Wang:1995:DMP,
author = "Karl Wang and Chris Bryant and Mike Carlson and Tom
Elmer and Adrian Harris and Michael Garcia and C. S.
Hui and C. K. Leung and Brian Reynolds and Raymond Tang
and Laura Weber and Jim Wenzel and Glen Wilson and Mike
Becker",
title = "Designing the {MPC105 PCI} bridge\slash memory
controller",
journal = j-IEEE-MICRO,
volume = "15",
number = "2",
pages = "44--49",
month = apr,
year = "1995",
CODEN = "IEMIDZ",
ISSN = "0272-1732",
bibdate = "Thu Dec 14 06:08:58 MST 2000",
bibsource = "Compendex database; Science Citation Index database
(1980--2000)",
note = "Presented at Hot Chips VI, Stanford University, CA,
August 14--16, 1994.",
acknowledgement = ack-nhfb,
affiliation = "Somerset Design Cent",
affiliationaddress = "Austin, TX, USA",
classcodes = "B1265F (Microprocessors and microcomputers); B1265D
(Memory circuits); C5610P (Peripheral interfaces);
C5130 (Microprocessor chips); C5320G (Semiconductor
storage)",
classification = "714.2; 721.3; 722.1; 722.2; 722.4; 723.2",
corpsource = "Somerset Design Center, Austin, TX, USA",
keywords = "Bit address bus; Bridge chip; Bridge/memory
controller; Buffer storage; CMOS integrated circuits;
compliant bridge; Computer architecture; Computer
peripheral equipment; Data transfer; DRAM; DRAM chips;
flash ROM; high-; Interconnection networks; Interfaces
(computer); Memory controller; Microcomputers;
microcontrollers; Microprocessor chips; MPC105 PCI
bridge/memory controller; Multiprocessing systems; PCI
bus; performance memory controller; Peripheral
component interconnection; peripheral interfaces;
Platform specification compliant bridge;
platform-specification-; Power PC microprocessors;
Random access storage; rom; ROM; Secondary cache
controller; secondary cache controller; Specifications;
standard PC interfaces; synchronous DRAM",
treatment = "A Application; P Practical",
}
@Article{Amarasinghe:1996:MSP,
author = "Saman P. Amarasinghe and Jennifer M. Anderson and
Christopher S. Wilson and Shih-Wei Liao and Brian R.
Murphy and Robert S. French and Monica S. Lam and Mary
W. Hall",
title = "Multiprocessors from a Software Perspective ---
Automatically parallelizing benchmark programs to yield
the highest {SPECfp} ratios recorded",
journal = j-IEEE-MICRO,
volume = "16",
number = "3",
pages = "52--61",
month = jun,
year = "1996",
CODEN = "IEMIDZ",
ISSN = "0272-1732",
bibdate = "Thu Dec 14 06:08:58 MST 2000",
bibsource = "Compendex database; Science Citation Index database
(1980--2000)",
note = "Presented at Hot Chips VII, Stanford University,
Stanford, California, August 1995.",
acknowledgement = ack-nhfb,
affiliation = "Stanford Univ",
affiliationaddress = "CA, USA",
classcodes = "C6110P (Parallel programming); C5440 (Multiprocessing
systems); C6150C (Compilers, interpreters and other
processors)",
classification = "722; 722.4; 723; 723.1",
corpsource = "Dept. of Electr. Eng., Stanford Univ., CA, USA",
keywords = "automatic parallelization; Automatic parallelization
technology; compiler; compilers; Computer architecture;
multiprocessing systems; multiprocessors; Parallel
processing systems; parallel programming;
parallelising; Program compilers; software
development",
treatment = "P Practical",
}
@InProceedings{Aoki:1996:PCU,
author = "Chris Aoki and Peter Damron and Kurt Goebel and Vinod
Grover and Xiangyun Kong and Michael Lai and Krishna
Subramanian and Partha Tirumalai and Jian-Zhong Wang",
title = "A Parallelizing Compiler for {UltraSPARC}",
crossref = "IEEE:1996:HCV",
pages = "??--??",
year = "1996",
bibdate = "Mon Jan 08 16:08:21 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc96/hc8_pdf/2.2.pdf",
acknowledgement = ack-nhfb,
}
@InProceedings{Arimilli:1996:OCH,
author = "Ravi Arimilli",
title = "The {Orca} Chip \ldots{} Heart of {IBM}'s {RISC
System\slash 6000} ``{Value}'' Servers",
crossref = "IEEE:1996:HCV",
pages = "35--46",
year = "1996",
bibdate = "Sat Jan 6 19:21:13 MST 2001",
bibsource = "OCLC Proceedings database;
ftp://www.hotchips.org/pub/hotc7to11cd/hc96/hc8_pdf/1.3.pdf",
acknowledgement = ack-nhfb,
}
@InProceedings{Boser:1996:SMI,
author = "Bernhard E. Boser",
title = "Surface Micromachining: An {IC} Compatible Sensor
Technology",
crossref = "IEEE:1996:HCV",
pages = "241--256",
year = "1996",
bibdate = "Sat Jan 6 19:21:13 MST 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc96/hc8_pdf/8.1.pdf;
OCLC Proceedings database",
acknowledgement = ack-nhfb,
}
@InProceedings{Bouchard:1996:DOM,
author = "Gregg Bouchard and Pete Bannon",
title = "Design Objective of the 0.35-micron {Alpha 21164}
Microprocessor",
crossref = "IEEE:1996:HCV",
pages = "21--34",
year = "1996",
bibdate = "Sat Jan 6 19:21:13 MST 2001",
bibsource = "OCLC Proceedings database",
URL = "ftp://www.hotchips.org/pub/hotc7to11cd/hc96/hc8_pdf/1.2.pdf",
acknowledgement = ack-nhfb,
}
@InProceedings{Chapman:1996:HPC,
author = "David Chapman",
title = "High Performance Caches: The Quiet Revolution",
crossref = "IEEE:1996:HCV",
pages = "95--108",
year = "1996",
bibdate = "Sat Jan 6 19:21:13 MST 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc96/hc8_pdf/3.2.pdf;
OCLC Proceedings database",
acknowledgement = ack-nhfb,
}
@Article{Christie:1996:DAK,
author = "Dave Christie",
title = "Developing the {AMD-K5} architecture: Flying without
instruments: the independent development on the {x86}
processor",
journal = j-IEEE-MICRO,
volume = "16",
number = "2",
pages = "16--26",
month = apr,
year = "1996",
CODEN = "IEMIDZ",
ISSN = "0272-1732",
bibdate = "Thu Dec 14 06:08:58 MST 2000",
bibsource = "Compendex database; Science Citation Index database
(1980--2000)",
note = "Presented at Hot Chips VII, Stanford University,
Stanford, California, August 1995.",
acknowledgement = ack-nhfb,
affiliation = "Advanced Micro Devices",
affiliationaddress = "Austin, TX, USA",
classcodes = "B1265F (Microprocessors and microcomputers); C5130
(Microprocessor chips)",
classification = "714.2; 721.2; 721.3; 722.4; 723.1; 723.5",
corpsource = "Adv. Micro Devices Inc., Austin, TX, USA",
keywords = "AMD-K5 architecture; Buffer storage; Computer
architecture; Computer hardware; Computer operating
systems; Computer simulation; Computer software;
dependency-driven execution; Execution control logic;
Logic design; Logic gates; Microarchitecture;
microarchitecture; Microcomputers; microprocessor;
Microprocessor chips; microprocessor chips;
Performance; Personal computers; Register transfer
logic; System verification; x86-compatible",
treatment = "P Practical",
}
@InProceedings{Djabbari:1996:CVC,
author = "Ali Djabbari",
title = "Custom {VLSI} for the Compositing {DAC} of the
{Touchstone Multimedia Accelerator}",
crossref = "IEEE:1996:HCV",
pages = "227--240",
year = "1996",
bibdate = "Sat Jan 6 19:21:13 MST 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc96/hc8_pdf/7.3.pdf;
OCLC Proceedings database",
acknowledgement = ack-nhfb,
alttitle = "Custom {VLSI} for the Compositing Buffer and Media
{DAC} Functions",
}
@InProceedings{Garside:1996:A,
author = "Jim Garside",
title = "{AMULET2e}",
crossref = "IEEE:1996:HCV",
pages = "257--274",
year = "1996",
bibdate = "Sat Jan 6 19:21:13 MST 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc96/hc8_pdf/8.2.pdf;
OCLC Proceedings database",
acknowledgement = ack-nhfb,
}
@InProceedings{Hohensee:1996:WCE,
author = "Paul Hohensee and Mat Myszewski and David Reese",
title = "The {Wabi CPU} Emulator Technology",
crossref = "IEEE:1996:HCV",
pages = "47--66",
year = "1996",
bibdate = "Sat Jan 6 19:21:13 MST 2001",
bibsource = "OCLC Proceedings database;
ftp://www.hotchips.org/pub/hotc7to11cd/hc96/hc8_pdf/2.1.pdf",
acknowledgement = ack-nhfb,
}
@InProceedings{Holmann:1996:VPM,
author = "Edgar Holmann and Toyohiko Yoshida and Akira Yamada
and Yukihiko Shimazu",
title = "A {VLIW} Processor for Multimedia Applications",
crossref = "IEEE:1996:HCV",
pages = "193--202",
year = "1996",
bibdate = "Sat Jan 6 19:21:13 MST 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc96/hc8_pdf/6.3.pdf;
OCLC Proceedings database",
acknowledgement = ack-nhfb,
}
@Article{Jouppi:1996:GEI,
author = "Norman P. Jouppi and Hasan S. Alkhatib",
title = "{Guest Editors}' introduction: Hot chips and the
microprocessor",
journal = j-IEEE-MICRO,
volume = "16",
number = "2",
pages = "6--7",
month = apr,
year = "1996",
CODEN = "IEMIDZ",
ISSN = "0272-1732",
bibdate = "Thu Dec 14 06:08:58 MST 2000",
bibsource = "Science Citation Index database (1980--2000)",
acknowledgement = ack-nhfb,
}
@InProceedings{Joy:1996:MAL,
author = "Bill Joy",
title = "Microprocessor Architecture: Looking Forward",
crossref = "IEEE:1996:HCV",
pages = "??--??",
year = "1996",
bibdate = "Mon Jan 08 16:08:21 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc96/hc8_pdf/BillJoyHC8pres.pdf",
acknowledgement = ack-nhfb,
pagecount = "5",
}
@InProceedings{Kagan:1996:PMF,
author = "Michael Kagan",
title = "The {P55C} Microarchitecture --- The First
Implementation of {MMX} Technology",
crossref = "IEEE:1996:HCV",
pages = "157--162",
year = "1996",
bibdate = "Sat Jan 6 19:21:13 MST 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc96/hc8_pdf/5.2.pdf;
OCLC Proceedings database",
acknowledgement = ack-nhfb,
}
@InProceedings{Kalapathy:1996:HSI,
author = "Paul Kalapathy",
title = "Hardware\slash Software Interaction on the {Mpact}
Media Processor",
crossref = "IEEE:1996:HCV",
pages = "179--192",
year = "1996",
bibdate = "Sat Jan 6 19:21:13 MST 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc96/hc8_pdf/6.2.pdf;
OCLC Proceedings database",
acknowledgement = ack-nhfb,
}
@InProceedings{Khurana:1996:BWG,
author = "A. Khurana",
title = "Bringing Workstation Graphics Performance to a Desktop
Near You: {ViRGE VX}",
crossref = "IEEE:1996:HCV",
pages = "289--298",
year = "1996",
bibdate = "Sat Jan 6 19:21:13 MST 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc96/hc8_pdf/9.2.pdf;
OCLC Proceedings database",
acknowledgement = ack-nhfb,
xxauthor = "Phil Bernosky and Scott Tandy",
}
@InProceedings{Kilgariff:1996:TFA,
author = "Emmett Kilgariff and Martin Randall",
title = "{Touchstone} --- {A} Fresh Approach to Multimedia for
the {PC}",
crossref = "IEEE:1996:HCV",
pages = "203--216",
year = "1996",
bibdate = "Sat Jan 6 19:21:13 MST 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc96/hc8_pdf/7.1.pdf;
OCLC Proceedings database",
acknowledgement = ack-nhfb,
}
@Article{Kondo:1996:TCM,
author = "Toshio Kondo and Kazuhito Suguri and Mitsuo Ikeda and
Tetsuya Abe and Hiroaki Matsuda and Tsuneo Okubo and
Kenji Ogura and Yutaka Tashiro and Naoki Ono and
Toshihiro Minami and Ritsu Kusaba and Takeshi Ikenaga
and Nobutaro Shibata and Ryota Kasai and Koji Otsu and
Fumiaki Nakagawa and Yasuhiko Sato",
title = "Two-chip {MPEG-2} video encoder: Switching to simple
profile at main level for a cost-effective encoder",
journal = j-IEEE-MICRO,
volume = "16",
number = "2",
pages = "51--58",
month = apr,
year = "1996",
CODEN = "IEMIDZ",
ISSN = "0272-1732",
bibdate = "Thu Dec 14 06:08:58 MST 2000",
bibsource = "Science Citation Index database (1980--2000);
Compendex database",
note = "Presented at Hot Chips VII, Stanford University,
Stanford, California, August 1995.",
acknowledgement = ack-nhfb,
affiliation = "Nippon Telegraph and Telephone Corp",
affiliationaddress = "Jpn",
classcodes = "B6220M (Speech and video codecs); B6140C (Optical
information, image and video signal processing); C5135
(Digital signal processing chips); C5260B (Computer
vision and image processing techniques)",
classification = "714.2; 716.4; 721.3; 722.4; 723.2; 902.2",
corpsource = "NTT LSI Labs., Kanagawa, Japan",
keywords = "cable television; Computer hardware; data compression;
digital; digital signal processing chips; digital video
disks; encoder; estimation; external memories; Image
coding; Image communication systems; Image compression;
Image quality; Microprocessor chips; motion; Motion
compensation; Motion estimation; motion estimation;
Motion pictures; Motion pictures expert group; Moving;
Multimedia; NTSC 4:2:0 video signals; Pictures Experts
Group standard; Random access storage; Real time
systems; real-; Reduced instruction set computing;
Specifications; Standards; time encoding; two-chip real
time MPEG-2 simple-profile-at-main-level; video codec
system; video codecs; video coding; Video encoder;
video on demand; Video signal processing",
treatment = "P Practical",
}
@InProceedings{Kumar:1996:HPR,
author = "Ashok Kumar",
title = "The {HP PA-8000 RISC CPU}: {A} High Performance
Out-of-Order Processor",
crossref = "IEEE:1996:HCV",
pages = "9--20",
year = "1996",
bibdate = "Sat Jan 6 19:21:13 MST 2001",
bibsource = "OCLC Proceedings database",
acknowledgement = ack-nhfb,
}
@InProceedings{Larri:1996:ADB,
author = "Guy Larri",
title = "{ARM810}: Dancing to the Beat of a Different Drum",
crossref = "IEEE:1996:HCV",
pages = "109--118",
year = "1996",
bibdate = "Mon Jan 08 16:08:21 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc96/hc8_pdf/4.1.pdf;
OCLC Proceedings database",
acknowledgement = ack-nhfb,
}
@InProceedings{Maher:1996:MIS,
author = "Robert Maher",
title = "Multimedia Instruction Set Extensions for a
Sixth-Generation x86 Processor",
crossref = "IEEE:1996:HCV",
pages = "163--170",
year = "1996",
bibdate = "Sat Jan 6 19:21:13 MST 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc96/hc8_pdf/5.3.pdf;
OCLC Proceedings database",
acknowledgement = ack-nhfb,
keywords = "Cyrix M2 processor",
}
@InProceedings{Montrym:1996:IGP,
author = "John Montrym and Brian McClendon",
title = "{InfiniteReality Graphics} --- Power Through
Complexity",
crossref = "IEEE:1996:HCV",
pages = "299--308",
year = "1996",
bibdate = "Sat Jan 6 19:21:13 MST 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc96/hc8_pdf/9.3.pdf;
OCLC Proceedings database",
acknowledgement = ack-nhfb,
}
@InProceedings{Nguyen:1996:EMS,
author = "L. T. Nguyen and M. Mohamed and H. Park and Y. Pai and
R. Wong and A. Qureshi and P. Song and H. D. Truong and
C. Reader",
title = "Establish {MSP} as the Standard for Media Processing",
crossref = "IEEE:1996:HCV",
pages = "217--226",
year = "1996",
bibdate = "Sat Jan 6 19:21:13 MST 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc96/hc8_pdf/7.2.pdf;
OCLC Proceedings database",
acknowledgement = ack-nhfb,
alttitle = "{Multimedia Signal Processor (MSP)} Summary",
}
@Article{Papworth:1996:TPP,
author = "David B. Papworth",
title = "Tuning the {Pentium Pro} microarchitecture: Refining a
design from the initial goals, performance simulations,
trade-offs, and dies to the final product",
journal = j-IEEE-MICRO,
volume = "16",
number = "2",
pages = "8--15",
month = apr,
year = "1996",
CODEN = "IEMIDZ",
ISSN = "0272-1732",
bibdate = "Thu Dec 14 06:08:58 MST 2000",
bibsource = "Compendex database; Science Citation Index database
(1980--2000)",
note = "Presented at Hot Chips VII, Stanford University,
Stanford, California, August 1995.",
acknowledgement = ack-nhfb,
affiliation = "Intel Corp",
affiliationaddress = "Hillsboro, OR, USA",
classcodes = "B1265F (Microprocessors and microcomputers); C5130
(Microprocessor chips)",
classification = "714.2; 721.3; 722.1; 722.4; 723.1; 902.2",
corpsource = "Intel Corp., Hillsboro, OR, USA",
keywords = "Buffer storage; Central processing unit; Computer
architecture; Computer operating systems; Computer
simulation; Computer software; Microarchitecture;
Microcomputers; microprocessor; Microprocessor chips;
microprocessor chips; Pentium Pro microarchitecture;
Performance; Pipeline processing systems; Process
technology; process technology; Product design; Program
compilers; semiconductor; Standards; Technology",
treatment = "P Practical",
}
@InProceedings{Patterson:1996:CID,
author = "David Patterson and Tom Anderson and Kathy Yelick",
title = "The Case for {Intelligent DRAM}: {IRAM}",
crossref = "IEEE:1996:HCV",
pages = "75--94",
year = "1996",
bibdate = "Sat Jan 6 19:21:13 MST 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc96/hc8_pdf/3.1.pdf;
http://iram.cs.berkeley.edu/; OCLC Proceedings
database",
acknowledgement = ack-nhfb,
}
@InProceedings{Pratt:1996:ATT,
author = "Yale Pratt",
title = "Afternoon Tutorial: Toward 10 Instructions\slash Cycle
Uniprocessors",
crossref = "IEEE:1996:HCV",
pages = "??--??",
year = "1996",
bibdate = "Mon Jan 08 16:08:21 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc96/hc8_pdf/hc96nav.pdf",
acknowledgement = ack-nhfb,
}
@InProceedings{Reinhardt:1996:PNH,
author = "Dennis Reinhardt",
title = "Proceedings Notebook for {Hot Chips VIII, Stanford
University, August 19-20, 1996}",
crossref = "IEEE:1996:HCV",
pages = "??--??",
year = "1996",
bibdate = "Mon Jan 08 16:08:21 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc96/hc8_pdf/Intro.pdf",
acknowledgement = ack-nhfb,
pagecount = "7",
}
@InProceedings{Santhanam:1996:SCA,
author = "Sribalan Santhanam",
title = "{StrongArm 110}: {A} {160MHz 32b 0.5W CMOS ARM}
Processor",
crossref = "IEEE:1996:HCV",
pages = "119--130",
year = "1996",
bibdate = "Sat Jan 6 19:21:13 MST 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc96/hc8_pdf/4.2.pdf;
OCLC Proceedings database",
acknowledgement = ack-nhfb,
}
@InProceedings{Shao:1996:MTJ,
author = "Sami Shao",
title = "Morning Tutorial: Java Software Secrets",
crossref = "IEEE:1996:HCV",
pages = "??--??",
year = "1996",
bibdate = "Mon Jan 08 16:08:21 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc96/hc8_pdf/hc96nav.pdf",
acknowledgement = ack-nhfb,
}
@InProceedings{Slavenburg:1996:TTP,
author = "Gerrit A. Slavenburg and Selliah Rathnam and Henk
Dijkstra",
title = "The {Trimedia TM-1 PCI VLIW} Mediaprocessor",
crossref = "IEEE:1996:HCV",
pages = "171--178",
year = "1996",
bibdate = "Sat Jan 6 19:21:13 MST 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc96/hc8_pdf/6.1.pdf;
OCLC Proceedings database",
acknowledgement = ack-nhfb,
}
@InProceedings{Tirumalai:1996:PCU,
author = "Partha Tirumalai and Vinod Grover and Xiangyun Kong
and Michael Lai and Jian-Zhong Wang and Kurt Goebel and
Chris Aoki and Peter Damron and Krishna Subramanian",
title = "A Parallelizing Compiler for {UltraSPARC} Systems",
crossref = "IEEE:1996:HCV",
pages = "67--74",
year = "1996",
bibdate = "Sat Jan 6 19:21:13 MST 2001",
bibsource = "OCLC Proceedings database",
acknowledgement = ack-nhfb,
}
@InProceedings{Tremblay:1996:PHI,
author = "Marc Tremblay and Michael O'Connor",
title = "{PicoJava}: {A} hardware Implementation of the {Java
Virtual Machine}",
crossref = "IEEE:1996:HCV",
pages = "131--144",
year = "1996",
bibdate = "Sat Jan 6 19:21:13 MST 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc96/hc8_pdf/4.3.pdf;
OCLC Proceedings database",
acknowledgement = ack-nhfb,
}
@Article{Tremblay:1996:UFI,
author = "Marc Tremblay and J. Michael O'Connor",
title = "{UltraSparc I}: {A} four-issue processor supporting
multimedia: Combining on-chip multimedia instructions
with a high-performance, four-issue architecture",
journal = j-IEEE-MICRO,
volume = "16",
number = "2",
pages = "42--50",
month = apr,
year = "1996",
CODEN = "IEMIDZ",
ISSN = "0272-1732",
bibdate = "Sat Jan 13 09:04:51 2001",
bibsource = "Compendex database; Science Citation Index database
(1980--2000)",
note = "Presented at Hot Chips VII, Stanford University,
Stanford, California, August 1995.",
acknowledgement = ack-nhfb,
affiliation = "Sun Microelectronics",
affiliationaddress = "Mountain View, CA, USA",
classcodes = "B1265F (Microprocessors and microcomputers); C5130
(Microprocessor chips); C5220 (Computer architecture);
C6130M (Multimedia)",
classification = "714.2; 721.3; 722.4; 723.2; 723.5; 741",
corpsource = "Sun Microsyst. Inc., Mountain View, CA, USA",
keywords = "architecture; Buffer storage; Computer graphics;
Computer hardware; Computer simulation; Computer
software; four-issue processor supporting multimedia;
graphics instructions; image; image compression; Image
processing; instruction set; instruction set computing;
memory access instructions; Microarchitecture;
Microcomputers; Microprocessor chips; microprocessor
chips; Multimedia; multimedia; multimedia systems;
Parallel processing systems; Performance; Pipeline
processing systems; processing; Program compilers;
reduced; Reduced instruction set computing; SPARC
Version 9 64-bit RISC; Superscalar processor;
superscalar processor; UltraSparc I; Visual instruction
set",
treatment = "A Application; P Practical",
}
@InProceedings{Trevett:1996:PGD,
author = "Neil Trevett",
title = "{Permedia} and {GLINT Delta}: New Generation Silicon
for {$3$D} Graphics",
crossref = "IEEE:1996:HCV",
pages = "275--288",
year = "1996",
bibdate = "Sat Jan 6 19:21:13 MST 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc96/hc8_pdf/9.1.pdf;
OCLC Proceedings database",
acknowledgement = ack-nhfb,
}
@InProceedings{Weiser:1996:TCP,
author = "Uri Weiser",
title = "Trade-off Considerations and Performance of {Intel}'s
{MMX} Technology",
crossref = "IEEE:1996:HCV",
pages = "147--156",
year = "1996",
bibdate = "Sat Jan 6 19:21:13 MST 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc96/hc8_pdf/5.1.pdf;
OCLC Proceedings database",
acknowledgement = ack-nhfb,
alttitle = "{Intel MMX} Technology --- an Overview",
}
@InProceedings{Wharton:1996:EPS,
author = "John Wharton and John Banning and Brian Case and David
S. Hardin and Martin Hopkins and John Novitsky and Marc
Tremblay",
title = "Evening Panel Session, {Lagunita Court}: Software or
Silicon: What's the Best Route to {Java}?",
crossref = "IEEE:1996:HCV",
pages = "145--146",
year = "1996",
bibdate = "Sat Jan 6 19:21:13 MST 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc96/hc8_pdf/Panel-Wharton.pdf;
ftp://www.hotchips.org/pub/hotc7to11cd/hc96/hc8_pdf/Panel-Novitsky.pdf;
ftp://www.hotchips.org/pub/hotc7to11cd/hc96/hc8_pdf/Panel-Hardin.pdf;
ftp://www.hotchips.org/pub/hotc7to11cd/hc96/hc8_pdf/Panel-Front.pdf;
OCLC Proceedings database",
acknowledgement = ack-nhfb,
}
@Article{Yeager:1996:MRS,
author = "Kenneth C. Yeager",
title = "The {MIPS R10000} superscalar microprocessor:
Emphasizing concurrency and latency-hiding techniques
to efficiently run large, real-world applications",
journal = j-IEEE-MICRO,
volume = "16",
number = "2",
pages = "28--40",
month = apr,
year = "1996",
CODEN = "IEMIDZ",
ISSN = "0272-1732",
bibdate = "Thu Dec 14 06:08:58 MST 2000",
bibsource = "Compendex database; Science Citation Index database
(1980--2000)",
note = "Presented at Hot Chips VII, Stanford University,
Stanford, California, August 1995.",
acknowledgement = ack-nhfb,
affiliation = "Silicon Graphics, Inc",
affiliationaddress = "Mountain View, CA, USA",
classcodes = "B1265F (Microprocessors and microcomputers); C5130
(Microprocessor chips)",
classification = "713.5; 714.2; 722.1; 722.2; 722.4",
corpsource = "Silicon Graphics Comput. Syst., Mountain View, CA,
USA",
keywords = "Buffer storage; cache refills; caches; Clocks;
Computer architecture; Computer hardware; Concurrency;
consistency; exception handling; Interfaces (computer);
Latency hiding technique; memory addresses; memory
latency; Memory latency; Microcomputers; Microprocessor
chips; microprocessor chips; MIPS R10000 superscalar
microprocessor; Performance; Phase locked loops;
Pipeline processing systems; Random access storage;
sequential memory; Shift registers; speculative
execution; Storage allocation (computer); Superscalar
microprocessor; write-back",
treatment = "P Practical",
}
@InProceedings{Anderson:1997:CPD,
author = "Jennifer Anderson and Lance Berc and Jeff Dean and
Sanjay Ghemawat and Monika Henzinger and Shun-Tak Leung
and Dick Sites and Mitch Lichtenberg and Mark
Vandevoorde and Carl Waldspurger and Bill Weihl",
title = "Continuous Profiling: (It's 10:43; Do You Know Where
Your Cycles Are?)",
crossref = "IEEE:1997:HCI",
pages = "??--??",
year = "1997",
bibdate = "Mon Jan 08 16:33:30 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc97/pdf_images/hc97_5b_anderson_2up.txt",
acknowledgement = ack-nhfb,
}
@InProceedings{Arai:1997:VAE,
author = "Tomohisa Arai and Kazumasa Suzuki and Ichiro Kuroda",
title = "{V830R\slash AV} Embedded Multimedia Superscalar
{RISC} Processor with {Rambus} Interface",
crossref = "IEEE:1997:HCI",
pages = "??--??",
year = "1997",
bibdate = "Mon Jan 08 16:33:30 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc97/pdf_images/hc97_7b_arai_2up.txt",
acknowledgement = ack-nhfb,
}
@InProceedings{Arakawa:1997:SRM,
author = "Fumio Arakawa and Osamu Nishii and Kunio Uchiyama and
Norio Nakagawa",
title = "{SH4 RISC} Microprocessor for Multimedia",
crossref = "IEEE:1997:HCI",
pages = "??--??",
year = "1997",
bibdate = "Mon Jan 08 16:33:30 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc97/pdf_images/hc97_7a_arakawa_2up.txt",
acknowledgement = ack-nhfb,
}
@InProceedings{Barthel:1997:PPV,
author = "Dominique Barthel",
title = "{PVP}: a {Parallel Video coProcessor}",
crossref = "IEEE:1997:HCI",
pages = "??--??",
year = "1997",
bibdate = "Mon Jan 08 16:33:30 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc97/pdf_images/hc97_8b_barthel_2up.txt",
acknowledgement = ack-nhfb,
}
@InProceedings{Battle:1997:EHP,
author = "Jim Battle",
title = "Efficient High Performance {$3$D} Pipeline
Implementation on a Media Processor",
crossref = "IEEE:1997:HCI",
pages = "??--??",
year = "1997",
bibdate = "Mon Jan 08 16:33:30 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc97/pdf_images/hc97_8d_battle_none.txt",
acknowledgement = ack-nhfb,
}
@InProceedings{Buchanan:1997:OLI,
author = "Mike Buchanan",
title = "Overview of the {Laguna II Rambus} Multimedia
Accelerator",
crossref = "IEEE:1997:HCI",
pages = "??--??",
year = "1997",
bibdate = "Mon Jan 08 16:33:30 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc97/pdf_images/hc97_8a_buchanan_none.txt",
acknowledgement = ack-nhfb,
}
@InProceedings{Burgess:1997:MPM,
author = "Brad Burgess",
title = "A{ 250 MHz 5W PowerPC} Microprocessor with On-Chip
{L2} Cache Controller",
crossref = "IEEE:1997:HCI",
pages = "??--??",
year = "1997",
bibdate = "Mon Jan 08 16:33:30 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc97/pdf_images/hc97_11a_burgess_none.txt",
acknowledgement = ack-nhfb,
}
@InProceedings{DeHon:1997:MRC,
author = "Andr{\'e} DeHon and Dan Harman and Ethan Mirsky",
title = "{MATRIX}: {A} Reconfigurable Computing Device with
Configurable Instruction Distribution",
crossref = "IEEE:1997:HCI",
pages = "??--??",
year = "1997",
bibdate = "Mon Jan 08 16:33:30 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc97/pdf_images/hc97_1b_mirsky_scan_2up.txt",
acknowledgement = ack-nhfb,
}
@InProceedings{Dubey:1997:ATA,
author = "Pradeep Dubey",
title = "Afternoon Tutorial: Architectural and Design
Implications of Mediaprocessing",
crossref = "IEEE:1997:HCI",
pages = "??--??",
year = "1997",
bibdate = "Mon Jan 08 16:33:30 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc97/pdf_images/hc97nav.txt",
acknowledgement = ack-nhfb,
}
@InProceedings{Eerola:1997:PRT,
author = "Ville Eerola",
title = "{Pyramid3D}: Real-time Graphics Processor",
crossref = "IEEE:1997:HCI",
pages = "??--??",
year = "1997",
bibdate = "Mon Jan 08 16:33:30 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc97/pdf_images/hc97_10c_eerola_2up.txt",
acknowledgement = ack-nhfb,
}
@InProceedings{Hayes:1997:RCP,
author = "Ken Hayes",
title = "{Reality} Co-Processor --- The Power In {Nintendo64}",
crossref = "IEEE:1997:HCI",
pages = "??--??",
year = "1997",
bibdate = "Mon Jan 08 16:33:30 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc97/pdf_images/hc97_10b_hayes_2up.txt",
acknowledgement = ack-nhfb,
}
@InProceedings{Holzle:1997:JSS,
author = "Urs H{\"o}lzle and Lars Bak and Steffen Grarup and
Robert Griesemer and Srdjan Mitrovic",
title = "{Java} On Steroids: {Sun}'s High-Performance {Java}
Implementation",
crossref = "IEEE:1997:HCI",
pages = "??--??",
year = "1997",
bibdate = "Mon Jan 08 16:33:30 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc97/pdf_images/hc97_4c_hoelzle_2up.txt",
acknowledgement = ack-nhfb,
}
@InProceedings{Hundt:1997:HOA,
author = "Reed Hundt",
title = "{HDTV} and Other Advances in Communications and
Broadcasting",
crossref = "IEEE:1997:HCI",
pages = "??--??",
year = "1997",
bibdate = "Mon Jan 08 16:33:30 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc97/pdf_images/hc97nav.txt",
acknowledgement = ack-nhfb,
}
@InProceedings{Keckler:1997:MC,
author = "Steve Keckler",
title = "The {MIT MAP} Chip",
crossref = "IEEE:1997:HCI",
pages = "??--??",
year = "1997",
bibdate = "Mon Jan 08 16:33:30 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc97/pdf_images/hc97_1a_keckler_2up.txt",
acknowledgement = ack-nhfb,
alttitle = "The {MIT} Multi-{ALU} Processor",
}
@InProceedings{Lee:1997:EMM,
author = "Ruby Lee",
title = "Effectiveness of the {MAX-2} Multimedia Extensions for
{PA-RISC 2.0} Processors",
crossref = "IEEE:1997:HCI",
pages = "??--??",
year = "1997",
bibdate = "Mon Jan 08 16:33:30 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc97/pdf_images/hc97_5a_lee_1up.txt",
acknowledgement = ack-nhfb,
}
@InProceedings{Malinowski:1997:TCA,
author = "Richard Malinowski",
title = "Technical challenges associated with the development
of the {Intel 440LX AGPset}",
crossref = "IEEE:1997:HCI",
pages = "??--??",
year = "1997",
bibdate = "Mon Jan 08 16:33:30 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc97/pdf_images/hc97_2a_malinowski_scan_2up.txt",
acknowledgement = ack-nhfb,
}
@Article{Mateosian:1997:MNV,
author = "R. M. Mateosian",
title = "Micro News: Visiting {Hot Chips IX}",
journal = j-IEEE-MICRO,
volume = "17",
number = "5",
pages = "5--5",
month = sep # "\slash " # oct,
year = "1997",
CODEN = "IEMIDZ",
ISSN = "0272-1732",
bibdate = "Thu Dec 14 06:08:58 MST 2000",
bibsource = "Science Citation Index database (1980--2000);
http://www.computer.org/micro/mi1997/",
URL = "http://dlib.computer.org/dynaweb/mi/mi1997/@ebt-link;hf=0?target=if(eq(query(%27%3CFNO%3E+cont+m5005%27),0),1,ancestor(ARTICLE,query(%27%3CFNO%3E+cont+m5005%27)));
http://dlib.computer.org/mi/books/mi1997/pdf/m5005.pdf",
acknowledgement = ack-nhfb,
}
@InProceedings{Meindl:1997:GIS,
author = "James Meindl",
title = "Gigascale Integration: Is the Sky the Limit?",
crossref = "IEEE:1997:HCI",
pages = "??--??",
year = "1997",
bibdate = "Mon Jan 08 16:33:30 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc97/pdf_images/hc97nav.txt",
acknowledgement = ack-nhfb,
}
@InProceedings{Modi:1997:PIC,
author = "Nimish Modi",
title = "The {PentiumAE II CPU}: {A} High Performance Dynamic
Execution Processor with {MMX} Technology",
crossref = "IEEE:1997:HCI",
pages = "??--??",
year = "1997",
bibdate = "Mon Jan 08 16:33:30 2001",
bibsource = "ftp://www.hotchips.org/pub/hotc7to11cd/hc97/pdf_images/hc97_11c_modi_none.txt",
acknowledgement = ack-nhfb,
}
@InProceedings{Nanya:1997:TBS,
author = "Takashi Nanya and Akihiro Takamura and Masashi Kuwako