# bibtab

bibtype: article
filename: fparith.bib
label: Duncan:1993:CES
author: Roy Duncan and John Tunstall and Brian T. Smith and Richard Brankin
title: Correspondence: Expert Systems for Re-ordering Arithmetic Expressions?
journal: j-FORTRAN-FORUM
volume: 12
number: 3
pages: 12--14
month: sep
monthnumber: 9
year: 1993
ISSN: 1061-7264 (print), 1931-1311 (electronic) OR 10617264 (print), 19311311 (electronic)
ISSNL: 1061-7264 OR 10617264
bibdate: Tue Apr 23 14:50:51 2002
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2002.04.23 14:50:51 ???
fjournal: ACM Fortran Forum
acknowledgement: ack-nhfb
journalURL: http://portal.acm.org/toc.cfm?id=J286
issue: 35
rawauthor: Roy Duncan and John Tunstall and Brian T. Smith and Richard Brankin
rawtitle: Correspondence: Expert Systems for Re-ordering Arithmetic Expressions?
entry:
@Article{Duncan:1993:CES,
  author =       "Roy Duncan and John Tunstall and Brian T. Smith and
                 Richard Brankin",
  title =        "Correspondence: Expert Systems for Re-ordering
                 Arithmetic Expressions?",
  journal =      j-FORTRAN-FORUM,
  volume =       "12",
  number =       "3",
  pages =        "12--14",
  month =        sep,
  year =         "1993",
  CODEN =        "????",
  ISSN =         "1061-7264 (print), 1931-1311 (electronic)",
  ISSN-L =       "1061-7264",
  bibdate =      "Tue Apr 23 14:50:51 2002",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "ACM Fortran Forum",
  issue =        "35",
  journal-URL =  "http://portal.acm.org/toc.cfm?id=J286",
}


bibtype: article
filename: fparith.bib
label: Duprat:1993:CAN
author: J. Duprat and J. Muller
title: The CORDIC Algorithm: New Results for Fast VLSI Implementation
journal: j-IEEE-TRANS-COMPUT
volume: 42
number: 2
pages: 168--178
month: feb
monthnumber: 2
year: 1993
CODEN: ITCOB4
DOI: https://doi.org/10.1109/12.204786
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Thu Sep 1 10:15:40 1994
bibsource: ftp://garbo.uwasa.fi/pc/doc-soft/fpbibl18.zip; https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1994.09.01 10:15:40 ???
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nj
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: J. Duprat and J. Muller
rawtitle: The {CORDIC} Algorithm: New Results for Fast {VLSI} Implementation
entry:
@Article{Duprat:1993:CAN,
  author =       "J. Duprat and J. Muller",
  title =        "The {CORDIC} Algorithm: New Results for Fast {VLSI}
                 Implementation",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "42",
  number =       "2",
  pages =        "168--178",
  month =        feb,
  year =         "1993",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/12.204786",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Thu Sep 1 10:15:40 1994",
  bibsource =    "ftp://garbo.uwasa.fi/pc/doc-soft/fpbibl18.zip;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nj,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
}


bibtype: inproceedings
filename: fparith.bib
label: Eisig:1993:DBI
author: David Eisig and Josh Rotstain and Israel Koren
title: The Design of a 64-bit Integer Multiplier / Divider Unit
crossref: Swartzlander:1993:SCA
pages: 171--178
year: 1993
bibdate: Sat Nov 17 09:46:07 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.17 09:46:07 ???
URL: http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Eisig.pdf
keywords: ARITH-11
acknowledgement: ack-nhfb
rawauthor: David Eisig and Josh Rotstain and Israel Koren
rawtitle: The Design of a 64-bit Integer Multiplier\slash Divider Unit
entry:
@InProceedings{Eisig:1993:DBI,
  author =       "David Eisig and Josh Rotstain and Israel Koren",
  title =        "The Design of a 64-bit Integer Multiplier\slash
                 Divider Unit",
  crossref =     "Swartzlander:1993:SCA",
  pages =        "171--178",
  year =         "1993",
  bibdate =      "Sat Nov 17 09:46:07 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Eisig.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-11",
}


bibtype: article
filename: fparith.bib
label: Eldridge:1993:HIM
author: S. E. Eldridge and C. D. Walter
title: Hardware implementation of Montgomery's modular multiplication algorithm
journal: j-IEEE-TRANS-COMPUT
volume: 42
number: 6
pages: 693--699
month: jun
monthnumber: 6
year: 1993
CODEN: ITCOB4
DOI: https://doi.org/10.1109/12.277287
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Thu Jul 7 07:58:49 MDT 2011
bibtimestamp: 2011.07.07 07:58:49 MDT
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=277287
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: S. E. Eldridge and C. D. Walter
rawtitle: Hardware implementation of {Montgomery}'s modular multiplication algorithm
entry:
@Article{Eldridge:1993:HIM,
  author =       "S. E. Eldridge and C. D. Walter",
  title =        "Hardware implementation of {Montgomery}'s modular
                 multiplication algorithm",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "42",
  number =       "6",
  pages =        "693--699",
  month =        jun,
  year =         "1993",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/12.277287",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Thu Jul 7 07:58:49 MDT 2011",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput1990.bib",
  URL =          "http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=277287",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
}


bibtype: inproceedings
filename: fparith.bib
label: Ercegovac:1993:VHR
author: Milos D. Ercegovac and Tomas Lang and Paolo Montuschi
title: Very high radix division with selection by rounding and prescaling
crossref: Swartzlander:1993:SCA
pages: 112--119
year: 1993
bibdate: Sat Jul 16 11:25:04 MDT 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.07.16 11:25:04 MDT
URL: http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Ercegovac.pdf
keywords: ARITH-11
acknowledgement: ack-nhfb
rawauthor: Milo{\v{s}} D. Ercegovac and Tom{\'a}s Lang and Paolo Montuschi
rawtitle: Very high radix division with selection by rounding and prescaling
entry:
@InProceedings{Ercegovac:1993:VHR,
  author =       "Milo{\v{s}} D. Ercegovac and Tom{\'a}s Lang and Paolo
                 Montuschi",
  title =        "Very high radix division with selection by rounding
                 and prescaling",
  crossref =     "Swartzlander:1993:SCA",
  pages =        "112--119",
  year =         "1993",
  bibdate =      "Sat Jul 16 11:25:04 MDT 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Ercegovac.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-11",
  summary =      "A division algorithm in which the quotient-digit
                 selection is performed by rounding the shifted residual
                 in carry-save form is presented. To allow the use of
                 this simple function, the divisor (and dividend) is
                 prescaled to a range close to one. The \ldots{}",
}


bibtype: inproceedings
filename: fparith.bib
label: Etiemble:1993:AMV
author: D. Etiemble and K. Navi
crossref: Swartzlander:1993:SCA
pages: 194--201
year: 1993
bibdate: Sat Nov 17 09:46:07 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.17 09:46:07 ???
URL: http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Etiemble.pdf
keywords: ARITH-11
acknowledgement: ack-nhfb
rawauthor: D. Etiemble and K. Navi
title:
Algorithms and Multi-Valued Circuits for the Multioperand Addition in the Binary Stored-Carry Number System

rawtitle:
Algorithms and Multi-Valued Circuits for the Multioperand Addition in the Binary Stored-Carry Number System

entry:
@InProceedings{Etiemble:1993:AMV,
  author =       "D. Etiemble and K. Navi",
  title =        "Algorithms and Multi-Valued Circuits for the
                 Multioperand Addition in the Binary Stored-Carry Number
                 System",
  crossref =     "Swartzlander:1993:SCA",
  pages =        "194--201",
  year =         "1993",
  bibdate =      "Sat Nov 17 09:46:07 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Etiemble.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-11",
}


bibtype: inproceedings
filename: fparith.bib
label: Fortune:1993:EEA
author: Steven Fortune and Christopher J. Van Wyk
editor: ACM
title: Efficient Exact Arithmetic for Computational Geometry
publisher: pub-ACM
address: pub-ACM:adr
pages: 163--172
year: 1993
DOI: https://doi.org/10.1145/160985.161015
ISBN: 0-89791-582-8 OR 0897915828
ISBN13: 978-0-89791-582-3 OR 9780897915823
LCCN: QA448.D38 S96 1993
bibdate: Tue Nov 13 21:44:58 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.13 21:44:58 ???
acknowledgement: ack-nhfb
bookpages: vii + 406
rawauthor: Steven Fortune and Christopher J. {Van Wyk}
raweditor: {ACM}
rawtitle: Efficient Exact Arithmetic for Computational Geometry
booktitle:
Proceedings of the 9th ACM Symposium on Computational Geometry, May 19--21, 1993, San Diego, CA, USA

rawbooktitle:
{Proceedings of the 9th ACM Symposium on Computational Geometry, May 19--21, 1993, San Diego, CA, USA}

entry:
@InProceedings{Fortune:1993:EEA,
  author =       "Steven Fortune and Christopher J. {Van Wyk}",
  editor =       "{ACM}",
  booktitle =    "{Proceedings of the 9th ACM Symposium on Computational
                 Geometry, May 19--21, 1993, San Diego, CA, USA}",
  title =        "Efficient Exact Arithmetic for Computational
                 Geometry",
  publisher =    pub-ACM,
  address =      pub-ACM:adr,
  bookpages =    "vii + 406",
  pages =        "163--172",
  year =         "1993",
  DOI =          "https://doi.org/10.1145/160985.161015",
  ISBN =         "0-89791-582-8",
  ISBN-13 =      "978-0-89791-582-3",
  LCCN =         "QA448.D38 S96 1993",
  bibdate =      "Tue Nov 13 21:44:58 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
}


bibtype: article
filename: fparith.bib
label: Fowkes:1993:HEA
author: R. E. Fowkes
title: Hardware Efficient Algorithms for Trigonometric Functions
journal: j-IEEE-TRANS-COMPUT
volume: 42
number: 3
pages: 235--239
month: feb
monthnumber: 2
year: 1993
CODEN: ITCOB4
DOI: https://doi.org/10.1109/12.204796
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Thu Sep 1 10:16:09 1994
bibsource: ftp://garbo.uwasa.fi/pc/doc-soft/fpbibl18.zip; https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1994.09.01 10:16:09 ???
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nj
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: R. E. Fowkes
rawtitle: Hardware Efficient Algorithms for Trigonometric Functions
entry:
@Article{Fowkes:1993:HEA,
  author =       "R. E. Fowkes",
  title =        "Hardware Efficient Algorithms for Trigonometric
                 Functions",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "42",
  number =       "3",
  pages =        "235--239",
  month =        feb,
  year =         "1993",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/12.204796",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Thu Sep 1 10:16:09 1994",
  bibsource =    "ftp://garbo.uwasa.fi/pc/doc-soft/fpbibl18.zip;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nj,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
}


bibtype: article
filename: fparith.bib
label: Fox:1993:HLS
author: J. R. Fox
title: A higher level of synthesis (CAD)
journal: j-IEEE-SPECTRUM
volume: 30
number: 3
pages: 43--47
month: mar
monthnumber: 3
year: 1993
CODEN: IEESAM
DOI: https://doi.org/10.1109/6.211955
ISSN: 0018-9235 (print), 1939-9340 (electronic) OR 00189235 (print), 19399340 (electronic)
ISSNL: 0018-9235 OR 00189235
bibdate: Thu Jan 16 07:37:23 2020
bibtimestamp: 2020.01.16 07:37:23 ???
fjournal: IEEE Spectrum
acknowledgement: ack-nhfb
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=6
rawauthor: J. R. Fox
rawtitle: A higher level of synthesis ({CAD})
bibsource:
https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/ieeespectrum1990.bib

keywords:
abstraction; Arithmetic; CAD; Circuit synthesis; Clocks; design automation; Design automation; Design engineering; design synthesis systems; Fabrication; Hardware; hardware description languages; Logic circuits; Logic design; Microarchitecture; software tools; specification languages; testability; top-down design

entry:
@Article{Fox:1993:HLS,
  author =       "J. R. Fox",
  title =        "A higher level of synthesis ({CAD})",
  journal =      j-IEEE-SPECTRUM,
  volume =       "30",
  number =       "3",
  pages =        "43--47",
  month =        mar,
  year =         "1993",
  CODEN =        "IEESAM",
  DOI =          "https://doi.org/10.1109/6.211955",
  ISSN =         "0018-9235 (print), 1939-9340 (electronic)",
  ISSN-L =       "0018-9235",
  bibdate =      "Thu Jan 16 07:37:23 2020",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeespectrum1990.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "IEEE Spectrum",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=6",
  keywords =     "abstraction; Arithmetic; CAD; Circuit synthesis;
                 Clocks; design automation; Design automation; Design
                 engineering; design synthesis systems; Fabrication;
                 Hardware; hardware description languages; Logic
                 circuits; Logic design; Microarchitecture; software
                 tools; specification languages; testability; top-down
                 design",
}


bibtype: mastersthesis
filename: fparith.bib
label: Geraminejad:1993:DIC
author: Mohsen Geraminejad
title: Design and implementation of a 16-bit CMOS floating point multiplier
type: Research paper (M.S.)
school: Department of Electrical Engineering, Southern Illinois University at Carbondale
address: Carbondale, IL, USA
pages: vii + 54
year: 1993
bibdate: Sat Feb 24 15:01:45 MST 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.02.24 15:01:45 MST
acknowledgement: ack-nhfb
rawauthor: Mohsen Geraminejad
rawtitle: Design and implementation of a 16-bit {CMOS} floating point multiplier
entry:
@MastersThesis{Geraminejad:1993:DIC,
  author =       "Mohsen Geraminejad",
  title =        "Design and implementation of a 16-bit {CMOS} floating
                 point multiplier",
  type =         "Research paper ({M.S.})",
  school =       "Department of Electrical Engineering, Southern
                 Illinois University at Carbondale",
  address =      "Carbondale, IL, USA",
  pages =        "vii + 54",
  year =         "1993",
  bibdate =      "Sat Feb 24 15:01:45 MST 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
}


bibtype: inproceedings
filename: fparith.bib
label: Gibbons:1993:FMW
author: Jeremy Gibbons
editor: John Hosking
title: Formal Methods: Why Should I Care? The development of the T800 transputer floating-point unit
publisher: New Zealand Computer Society
address: Wellington, NZ
pages: 207--217
year: 1993
ISBN: 0-9597657-6-X; 0-9597657-5-1 OR 095976576X; 0959765751
ISBN13: 978-0-9597657-6-2; 978-0-9597657-5-5 OR 9780959765762; 9780959765755
bibdate: Tue Nov 13 21:37:21 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.13 21:37:21 ???
keywords: Inmos T800 transputer
acknowledgement: ack-nhfb
rawauthor: Jeremy Gibbons
raweditor: John Hosking
booktitle:
Proceedings of the 13th New Zealand Computer Society Conference: Applying the future today, Aotea Centre, Auckland, 18--20 August 1993

abstract:
The term `formal methods' is a general term for precise mathematically-based techniques used in the development of computer systems, both hardware and software. This paper discusses formal methods in general, and in particular describes their successful role in specifying, constructing and proving correct the floating-point unit of the Inmos T800 transputer chip.

rawabstract:
The term `formal methods' is a general term for precise mathematically-based techniques used in the development of computer systems, both hardware and software. This paper discusses formal methods in general, and in particular describes their successful role in specifying, constructing and proving correct the floating-point unit of the Inmos T800 transputer chip.

rawbooktitle:
{Proceedings of the 13th New Zealand Computer Society Conference: Applying the future today, Aotea Centre, Auckland, 18--20 August 1993}

rawtitle:
Formal Methods: {Why} Should {I} Care? {The} development of the {T800} transputer floating-point unit

entry:
@InProceedings{Gibbons:1993:FMW,
  author =       "Jeremy Gibbons",
  editor =       "John Hosking",
  booktitle =    "{Proceedings of the 13th New Zealand Computer Society
                 Conference: Applying the future today, Aotea Centre,
                 Auckland, 18--20 August 1993}",
  title =        "Formal Methods: {Why} Should {I} Care? {The}
                 development of the {T800} transputer floating-point
                 unit",
  publisher =    "New Zealand Computer Society",
  address =      "Wellington, NZ",
  pages =        "207--217",
  year =         "1993",
  ISBN =         "0-9597657-6-X; 0-9597657-5-1",
  ISBN-13 =      "978-0-9597657-6-2; 978-0-9597657-5-5",
  LCCN =         "????",
  bibdate =      "Tue Nov 13 21:37:21 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "The term `formal methods' is a general term for
                 precise mathematically-based techniques used in the
                 development of computer systems, both hardware and
                 software. This paper discusses formal methods in
                 general, and in particular describes their successful
                 role in specifying, constructing and proving correct
                 the floating-point unit of the Inmos T800 transputer
                 chip.",
  acknowledgement = ack-nhfb,
  keywords =     "Inmos T800 transputer",
}


bibtype: techreport
filename: fparith.bib
label: Goldberg:1993:DFP
author: David Goldberg
title: The design of floating-point data types
type: Technical report
number: CSL-93-3
institution: Xerox Corp., Palo Alto Research Center
address: Palo Alto, CA, USA
pages: 19
year: 1993
bibdate: Sat Feb 24 15:01:45 MST 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.02.24 15:01:45 MST
keywords: Abstract data types (Computer science)
acknowledgement: ack-nhfb
rawauthor: David Goldberg
rawtitle: The design of floating-point data types
remark:
``A version of this paper will appear in Letters on Programming Languages and Systems.'' ``February 1993.'' Abstract: ``We discuss the issues involved in designing the floating-point part of a programming language. Looking at the language specifications for most existing languages might suggest that this design involves only trivial issues such as whether to have one or two types of REALs or how to name the functions that convert from INTEGER to REAL. We show that there are more significant semantic issues involved. After discussing the tradeoffs for the major design decisions, we illustrate them by presenting the design of the floating-point part of the Modula-3 language.''

entry:
@TechReport{Goldberg:1993:DFP,
  author =       "David Goldberg",
  title =        "The design of floating-point data types",
  type =         "Technical report",
  number =       "CSL-93-3",
  institution =  "Xerox Corp., Palo Alto Research Center",
  address =      "Palo Alto, CA, USA",
  pages =        "19",
  year =         "1993",
  bibdate =      "Sat Feb 24 15:01:45 MST 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "Abstract data types (Computer science)",
  remark =       "``A version of this paper will appear in Letters on
                 Programming Languages and Systems.'' ``February 1993.''
                 Abstract: ``We discuss the issues involved in designing
                 the floating-point part of a programming language.
                 Looking at the language specifications for most
                 existing languages might suggest that this design
                 involves only trivial issues such as whether to have
                 one or two types of REALs or how to name the functions
                 that convert from INTEGER to REAL. We show that there
                 are more significant semantic issues involved. After
                 discussing the tradeoffs for the major design
                 decisions, we illustrate them by presenting the design
                 of the floating-point part of the Modula-3
                 language.''",
}


bibtype: techreport
filename: fparith.bib
label: Gudeman:1993:RTI
author: David Gudeman
title: Representing Type Information in Dynamically Typed Languages
type: Technical report
number: TR 93-27
institution: Department of Computer Science, The University of Arizona
address: Tucson, AZ 85721, USA
pages: 40
month: oct
monthnumber: 10
year: 1993
bibdate: Wed Oct 13 08:12:36 2010
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2010.10.13 08:12:36 ???
keywords: floating-point arithmetic; integer arithmetic; Lisp; Prolog; typed objects
remark: Discusses implementation of fast arithmetic for typed integer and floating-point data.
acknowledgement: ack-nhfb
rawauthor: David Gudeman
rawtitle: Representing Type Information in Dynamically Typed Languages
URL:
ftp://ftp.cs.arizona.edu/reports/1993/TR93-27.ps; http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.39.4394

abstract:
This report is a discussion of various techniques for representing type information in dynamically typed languages, as implemented on general-purpose machines (and costs are discussed in terms of modern RISC machines). It is intended to make readily available a large body of knowledge that currently has to be absorbed piecemeal from the literature or re-invented by each language implementer. This discussion covers not only tagging schemes but other forms of representation as well, although the discussion is strictly limited to the representation of type information. It should also be noted that this report does not purport to contain a survey of the relevant literature. Instead, this report gathers together a body of folklore, organizes it into a logical structure, makes some generalizations, and then discusses the results in terms of modern hardware.

rawabstract:
This report is a discussion of various techniques for representing type information in dynamically typed languages, as implemented on general-purpose machines (and costs are discussed in terms of modern RISC machines). It is intended to make readily available a large body of knowledge that currently has to be absorbed piecemeal from the literature or re-invented by each language implementer. This discussion covers not only tagging schemes but other forms of representation as well, although the discussion is strictly limited to the representation of type information. It should also be noted that this report does not purport to contain a survey of the relevant literature. Instead, this report gathers together a body of folklore, organizes it into a logical structure, makes some generalizations, and then discusses the results in terms of modern hardware.

entry:
@TechReport{Gudeman:1993:RTI,
  author =       "David Gudeman",
  title =        "Representing Type Information in Dynamically Typed
                 Languages",
  type =         "Technical report",
  number =       "TR 93-27",
  institution =  "Department of Computer Science, The University of
                 Arizona",
  address =      "Tucson, AZ 85721, USA",
  pages =        "40",
  month =        oct,
  year =         "1993",
  bibdate =      "Wed Oct 13 08:12:36 2010",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "ftp://ftp.cs.arizona.edu/reports/1993/TR93-27.ps;
                 http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.39.4394",
  abstract =     "This report is a discussion of various techniques for
                 representing type information in dynamically typed
                 languages, as implemented on general-purpose machines
                 (and costs are discussed in terms of modern RISC
                 machines). It is intended to make readily available a
                 large body of knowledge that currently has to be
                 absorbed piecemeal from the literature or re-invented
                 by each language implementer. This discussion covers
                 not only tagging schemes but other forms of
                 representation as well, although the discussion is
                 strictly limited to the representation of type
                 information. It should also be noted that this report
                 does not purport to contain a survey of the relevant
                 literature. Instead, this report gathers together a
                 body of folklore, organizes it into a logical
                 structure, makes some generalizations, and then
                 discusses the results in terms of modern hardware.",
  acknowledgement = ack-nhfb,
  keywords =     "floating-point arithmetic; integer arithmetic; Lisp;
                 Prolog; typed objects",
  remark =       "Discusses implementation of fast arithmetic for typed
                 integer and floating-point data.",
}


bibtype: misc
filename: fparith.bib
label: Gupta:1993:NPF
author: S. Gupta and R. Periman and T. Lynch and B. McMinn
title: Normalizing pipelined floating point processing units
pages: 40
day: 30
month: nov
monthnumber: 11
year: 1993
bibdate: Fri Nov 28 15:27:34 2003
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2003.11.28 15:27:34 ???
note: U.S. Patent No. 5,267,186.
acknowledgement: ack-nhfb
rawauthor: S. Gupta and R. Periman and T. Lynch and B. McMinn
rawnote: U.S. Patent No. 5,267,186.
rawtitle: Normalizing pipelined floating point processing units
entry:
@Misc{Gupta:1993:NPF,
  author =       "S. Gupta and R. Periman and T. Lynch and B. McMinn",
  title =        "Normalizing pipelined floating point processing
                 units",
  day =          "30",
  month =        nov,
  year =         "1993",
  bibdate =      "Fri Nov 28 15:27:34 2003",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  note =         "U.S. Patent No. 5,267,186.",
  acknowledgement = ack-nhfb,
}


bibtype: incollection
filename: fparith.bib
label: Hammer:1993:PXN
author: R. Hammer and M. Neaga and D. Ratz
title: PASCAL-XSC: New Concepts for Scientific Computation and Numerical Data Processing
crossref: Adams:1993:SCA
pages: 15--44
year: 1993
bibdate: Wed Oct 13 22:38:56 2010
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2010.10.13 22:38:56 ???
acknowledgement: ack-nhfb
rawauthor: R. Hammer and M. Neaga and D. Ratz
rawtitle: {PASCAL-XSC}: New Concepts for Scientific Computation and Numerical Data Processing
entry:
@InCollection{Hammer:1993:PXN,
  author =       "R. Hammer and M. Neaga and D. Ratz",
  title =        "{PASCAL-XSC}: New Concepts for Scientific Computation
                 and Numerical Data Processing",
  crossref =     "Adams:1993:SCA",
  pages =        "15--44",
  year =         "1993",
  bibdate =      "Wed Oct 13 22:38:56 2010",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
}


bibtype: article
filename: fparith.bib
label: Hasan:1993:MMO
author: M. A. Hasan and M. Z. Wang and V. K. Bhargava
title: A modified Massey--Omura parallel multiplier for a class of finite fields
journal: j-IEEE-TRANS-COMPUT
volume: 42
number: 10
pages: 1278--1280
month: oct
monthnumber: 10
year: 1993
CODEN: ITCOB4
DOI: https://doi.org/10.1109/12.257715
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Thu Jul 7 07:58:51 MDT 2011
bibtimestamp: 2011.07.07 07:58:51 MDT
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=257715
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: M. A. Hasan and M. Z. Wang and V. K. Bhargava
rawtitle: A modified {Massey--Omura} parallel multiplier for a class of finite fields
entry:
@Article{Hasan:1993:MMO,
  author =       "M. A. Hasan and M. Z. Wang and V. K. Bhargava",
  title =        "A modified {Massey--Omura} parallel multiplier for a
                 class of finite fields",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "42",
  number =       "10",
  pages =        "1278--1280",
  month =        oct,
  year =         "1993",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/12.257715",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Thu Jul 7 07:58:51 MDT 2011",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput1990.bib",
  URL =          "http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=257715",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
}


bibtype: article
filename: fparith.bib
label: Hatzinakos:1993:AFP
author: D. Hatzinakos
title: Analysis of floating point roundoff errors in the estimation of higher-order statistics
journal: IEE proceedings. F, Radar and signal processing
volume: 140
number: 6
pages: 371--379
month: dec
monthnumber: 12
year: 1993
ISSN: 0956-375X OR 0956375X
bibdate: Sat Feb 24 15:01:45 MST 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.02.24 15:01:45 MST
acknowledgement: ack-nhfb
rawauthor: D. Hatzinakos
rawtitle: Analysis of floating point roundoff errors in the estimation of higher-order statistics
entry:
@Article{Hatzinakos:1993:AFP,
  author =       "D. Hatzinakos",
  title =        "Analysis of floating point roundoff errors in the
                 estimation of higher-order statistics",
  journal =      "IEE proceedings. F, Radar and signal processing",
  volume =       "140",
  number =       "6",
  pages =        "371--379",
  month =        dec,
  year =         "1993",
  ISSN =         "0956-375X",
  bibdate =      "Sat Feb 24 15:01:45 MST 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  summary =      "A floating point roundoff error analysis in the
                 estimation of higher-order statistics, moments or
                 cumulants of real stationary processes from single data
                 records is provided. Closed form expressions or upper
                 bounds are derived for the mean and \ldots{}",
}


bibtype: book
filename: fparith.bib
label: Heinrich:1993:MRM
author: Joe Heinrich
title: MIPS R4000 Microprocessor User's Manual
publisher: pub-PHPTR
address: pub-PHPTR:adr
pages: xxvi + 438 + A182 + B62 + C6 + D4 + E4
year: 1993
ISBN: 0-13-105925-4 OR 0131059254
ISBN13: 978-0-13-105925-2 OR 9780131059252
LCCN: QA76.8.M523H45 1993
bibdate: Wed Aug 10 11:02:27 1994
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/master.bib
bibtimestamp: 1994.08.10 11:02:27 ???
acknowledgement: ack-nhfb
rawauthor: Joe Heinrich
rawtitle: {MIPS R4000} Microprocessor User's Manual
TOC:
Introduction CPU Instruction Set Summary The CPU Pipeline Memory Management CPU Exception Processing Floating-Point Unit Floating-Point Exceptions R4000 Processor Signal Descriptions Initialization Interface Clock Interface Cache Organization, Operation, and Coherency System Interface Secondary Cache Interface JTAG Interface R4000 Processor Interrupts Error Checking and Correcting CPU Instruction Set Details FPU Instruction Set Details Subblock Ordering Output Buffer ldots Di ldots Dt Control Mechanism PLL Passive Components R4000 Coprocessor 0 Hazards

rawTOC:
Introduction \\ CPU Instruction Set Summary \\ The CPU Pipeline \\ Memory Management \\ CPU Exception Processing \\ Floating-Point Unit \\ Floating-Point Exceptions \\ R4000 Processor Signal Descriptions \\ Initialization Interface \\ Clock Interface \\ Cache Organization, Operation, and Coherency \\ System Interface \\ Secondary Cache Interface \\ JTAG Interface \\ R4000 Processor Interrupts \\ Error Checking and Correcting \\ CPU Instruction Set Details \\ FPU Instruction Set Details \\ Subblock Ordering \\ Output Buffer \ldots{} Di \ldots{} Dt Control Mechanism \\ PLL Passive Components \\ R4000 Coprocessor 0 Hazards

entry:
@Book{Heinrich:1993:MRM,
  author =       "Joe Heinrich",
  title =        "{MIPS R4000} Microprocessor User's Manual",
  publisher =    pub-PHPTR,
  address =      pub-PHPTR:adr,
  pages =        "xxvi + 438 + A182 + B62 + C6 + D4 + E4",
  year =         "1993",
  ISBN =         "0-13-105925-4",
  ISBN-13 =      "978-0-13-105925-2",
  LCCN =         "QA76.8.M523H45 1993",
  bibdate =      "Wed Aug 10 11:02:27 1994",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/master.bib",
  price =        "US\$34.00",
  acknowledgement = ack-nhfb,
  libnote =      "Not yet in my library.",
  tableofcontents = "Introduction \\
                 CPU Instruction Set Summary \\
                 The CPU Pipeline \\
                 Memory Management \\
                 CPU Exception Processing \\
                 Floating-Point Unit \\
                 Floating-Point Exceptions \\
                 R4000 Processor Signal Descriptions \\
                 Initialization Interface \\
                 Clock Interface \\
                 Cache Organization, Operation, and Coherency \\
                 System Interface \\
                 Secondary Cache Interface \\
                 JTAG Interface \\
                 R4000 Processor Interrupts \\
                 Error Checking and Correcting \\
                 CPU Instruction Set Details \\
                 FPU Instruction Set Details \\
                 Subblock Ordering \\
                 Output Buffer \ldots{} Di \ldots{} Dt Control Mechanism
                 \\
                 PLL Passive Components \\
                 R4000 Coprocessor 0 Hazards",
}


bibtype: inproceedings
filename: fparith.bib
label: Hekstra:1993:FPC
author: Gerben J. Hekstra and Ed F. A. Deprettere
title: Floating Point Cordic
crossref: Swartzlander:1993:SCA
pages: 130--137
year: 1993
bibdate: Sat Nov 17 09:46:07 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.17 09:46:07 ???
URL: http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Hekstra.pdf
keywords: ARITH-11
acknowledgement: ack-nhfb
rawauthor: Gerben J. Hekstra and Ed F. A. Deprettere
rawtitle: Floating Point Cordic
entry:
@InProceedings{Hekstra:1993:FPC,
  author =       "Gerben J. Hekstra and Ed F. A. Deprettere",
  title =        "Floating Point Cordic",
  crossref =     "Swartzlander:1993:SCA",
  pages =        "130--137",
  year =         "1993",
  bibdate =      "Sat Nov 17 09:46:07 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Hekstra.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-11",
}


bibtype: inproceedings
filename: fparith.bib
label: Hemkumar:1993:ECM
author: Nariankadu D. Hemkumar and Joseph R. Cavallaro
title: Efficient Complex Matrix Transformations with CORDIC
crossref: Swartzlander:1993:SCA
pages: 122--129
year: 1993
bibdate: Sat Nov 17 09:46:07 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.17 09:46:07 ???
URL: http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Hemkumar.pdf
keywords: ARITH-11
acknowledgement: ack-nhfb
rawauthor: Nariankadu D. Hemkumar and Joseph R. Cavallaro
rawtitle: Efficient Complex Matrix Transformations with {CORDIC}
entry:
@InProceedings{Hemkumar:1993:ECM,
  author =       "Nariankadu D. Hemkumar and Joseph R. Cavallaro",
  title =        "Efficient Complex Matrix Transformations with
                 {CORDIC}",
  crossref =     "Swartzlander:1993:SCA",
  pages =        "122--129",
  year =         "1993",
  bibdate =      "Sat Nov 17 09:46:07 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Hemkumar.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-11",
}


bibtype: article
filename: fparith.bib
label: Hendtlass:1993:MNIa
author: T. Hendtlass
title: Math-who needs it?
journal: j-FORTH-DIMENSIONS
volume: 14
number: 6
pages: 27--38
month: mar
monthnumber: 3
year: 1993
CODEN: FODMD5
ISSN: 0884-0822 OR 08840822
bibdate: Tue Dec 12 09:27:13 MST 1995
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1995.12.12 09:27:13 MST
fjournal: Forth Dimensions
acknowledgement: ack-nhfb
thesaurus: FORTH; FORTH listings; Mathematics computing
rawauthor: T. Hendtlass
rawtitle: Math-who needs it?
abstract:
A thorough treatment of integer, double-precision, fixed-point, and floating-point mathematics. A mathematician's toolbox of code is presented, and tables compare the benefits bestowed and the penalties extracted by the routines.

keywords:
Code toolbox; Double precision arithmetic; Fixed-point arithmetic; Floating-point mathematics; Integer

rawabstract:
A thorough treatment of integer, double-precision, fixed-point, and floating-point mathematics. A mathematician's toolbox of code is presented, and tables compare the benefits bestowed and the penalties extracted by the routines.

entry:
@Article{Hendtlass:1993:MNIa,
  author =       "T. Hendtlass",
  title =        "Math-who needs it?",
  journal =      j-FORTH-DIMENSIONS,
  volume =       "14",
  number =       "6",
  pages =        "27--38",
  month =        mar # "--" # apr,
  year =         "1993",
  CODEN =        "FODMD5",
  ISSN =         "0884-0822",
  bibdate =      "Tue Dec 12 09:27:13 MST 1995",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "A thorough treatment of integer, double-precision,
                 fixed-point, and floating-point mathematics. A
                 mathematician's toolbox of code is presented, and
                 tables compare the benefits bestowed and the penalties
                 extracted by the routines.",
  acknowledgement = ack-nhfb,
  classification = "C6140D (High level languages); C7310 (Mathematics)",
  fjournal =     "Forth Dimensions",
  keywords =     "Code toolbox; Double precision arithmetic; Fixed-point
                 arithmetic; Floating-point mathematics; Integer",
  thesaurus =    "FORTH; FORTH listings; Mathematics computing",
}


bibtype: article
filename: fparith.bib
label: Hendtlass:1993:MNIb
author: T. Hendtlass
title: Math---who needs it?
journal: j-FORTH-DIMENSIONS
volume: 15
number: 1
pages: 38--39
month: may
monthnumber: 5
year: 1993
CODEN: FODMD5
ISSN: 0884-0822 OR 08840822
bibdate: Tue Dec 12 09:27:13 MST 1995
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1995.12.12 09:27:13 MST
fjournal: Forth Dimensions
keywords: Double-precision; Fixed-point; Floating-point routines; Forth program; Math; Source code; Toolbox
acknowledgement: ack-nhfb
thesaurus: Digital arithmetic; FORTH listings; Mathematics computing; Programming
rawauthor: T. Hendtlass
rawtitle: Math---who needs it?
abstract:
The continuation of the source code for a Forth program is presented (see ibid., vol.14, no.6, 1993). The software is a math professor's toolbox of integer, double-precision, fixed-point and floating-point routines.

rawabstract:
The continuation of the source code for a Forth program is presented (see ibid., vol.14, no.6, 1993). The software is a math professor's toolbox of integer, double-precision, fixed-point and floating-point routines.

entry:
@Article{Hendtlass:1993:MNIb,
  author =       "T. Hendtlass",
  title =        "Math---who needs it?",
  journal =      j-FORTH-DIMENSIONS,
  volume =       "15",
  number =       "1",
  pages =        "38--39",
  month =        may # "--" # jun,
  year =         "1993",
  CODEN =        "FODMD5",
  ISSN =         "0884-0822",
  bibdate =      "Tue Dec 12 09:27:13 MST 1995",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "The continuation of the source code for a Forth
                 program is presented (see ibid., vol.14, no.6, 1993).
                 The software is a math professor's toolbox of integer,
                 double-precision, fixed-point and floating-point
                 routines.",
  acknowledgement = ack-nhfb,
  classification = "C6110 (Systems analysis and programming); C7310
                 (Mathematics)",
  fjournal =     "Forth Dimensions",
  keywords =     "Double-precision; Fixed-point; Floating-point
                 routines; Forth program; Math; Source code; Toolbox",
  thesaurus =    "Digital arithmetic; FORTH listings; Mathematics
                 computing; Programming",
}


bibtype: article
filename: fparith.bib
label: Higginbotham:1993:ISR
author: T. F. Higginbotham
title: The integer square root of N via a binary search
journal: j-SIGCSE
volume: 25
number: 4
pages: 41--45
month: dec
monthnumber: 12
year: 1993
CODEN: SIGSD3
DOI: https://doi.org/10.1145/164205.164229
ISSN: 0097-8418 (print), 2331-3927 (electronic) OR 00978418 (print), 23313927 (electronic)
ISSNL: 0097-8418 OR 00978418
bibdate: Sat Nov 17 18:57:24 MST 2012
bibtimestamp: 2012.11.17 18:57:24 MST
fjournal: SIGCSE Bulletin (ACM Special Interest Group on Computer Science Education)
acknowledgement: ack-nhfb
journalURL: http://portal.acm.org/browse_dl.cfm?idx=J688
rawauthor: T. F. Higginbotham
rawtitle: The integer square root of {N} via a binary search
bibsource:
http://portal.acm.org/; https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/sigcse1990.bib

abstract:
An algorithm is presented which may be used to find the integer square root of N. The method is intended for use on a binary computer, where only addition, subtraction, multiplication, or division by 2 is required. The problem arose when the author was working on factoring large numbers, where the machine, the Honeywell DPS 8, had double precision integer addition and subtraction, and the simulation of multiplication was easy. The actual factoring of the large number was to be Fermat's Method, requiring only addition and subtraction, but the integer square root is required in order to test for termination. The algorithm is implemented in FORTRAN for ease of reading. Students enjoy the unconventional approach to solving this problem. It isn't long before some of them think of other unusual solutions.

rawabstract:
An algorithm is presented which may be used to find the integer square root of N. The method is intended for use on a binary computer, where only addition, subtraction, multiplication, or division by 2 is required. The problem arose when the author was working on factoring large numbers, where the machine, the Honeywell DPS 8, had double precision integer addition and subtraction, and the simulation of multiplication was easy. The actual factoring of the large number was to be Fermat's Method, requiring only addition and subtraction, but the integer square root is required in order to test for termination. The algorithm is implemented in FORTRAN for ease of reading. Students enjoy the unconventional approach to solving this problem. It isn't long before some of them think of other unusual solutions.

entry:
@Article{Higginbotham:1993:ISR,
  author =       "T. F. Higginbotham",
  title =        "The integer square root of {N} via a binary search",
  journal =      j-SIGCSE,
  volume =       "25",
  number =       "4",
  pages =        "41--45",
  month =        dec,
  year =         "1993",
  CODEN =        "SIGSD3",
  DOI =          "https://doi.org/10.1145/164205.164229",
  ISSN =         "0097-8418 (print), 2331-3927 (electronic)",
  ISSN-L =       "0097-8418",
  bibdate =      "Sat Nov 17 18:57:24 MST 2012",
  bibsource =    "http://portal.acm.org/;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/sigcse1990.bib",
  abstract =     "An algorithm is presented which may be used to find
                 the integer square root of N. The method is intended
                 for use on a binary computer, where only addition,
                 subtraction, multiplication, or division by 2 is
                 required. The problem arose when the author was working
                 on factoring large numbers, where the machine, the
                 Honeywell DPS 8, had double precision integer addition
                 and subtraction, and the simulation of multiplication
                 was easy. The actual factoring of the large number was
                 to be Fermat's Method, requiring only addition and
                 subtraction, but the integer square root is required in
                 order to test for termination. The algorithm is
                 implemented in FORTRAN for ease of reading. Students
                 enjoy the unconventional approach to solving this
                 problem. It isn't long before some of them think of
                 other unusual solutions.",
  acknowledgement = ack-nhfb,
  fjournal =     "SIGCSE Bulletin (ACM Special Interest Group on
                 Computer Science Education)",
  journal-URL =  "http://portal.acm.org/browse_dl.cfm?idx=J688",
}


bibtype: article
filename: fparith.bib
label: Higham:1993:AFP
author: Nicholas J. Higham
title: The accuracy of floating point summation
journal: j-SIAM-J-SCI-COMP
volume: 14
number: 4
pages: 783--799
month: jul
monthnumber: 7
year: 1993
CODEN: SJOCE3
DOI: https://doi.org/10.1137/0914050
ISSN: 1064-8275 (print), 1095-7197 (electronic) OR 10648275 (print), 10957197 (electronic)
ISSNL: 1064-8275 OR 10648275
MRclass: 65G05 (65B10)
MRnumber: 94a:65025
bibdate: Thu Aug 23 06:36:53 2001
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2001.08.23 06:36:53 ???
fjournal: SIAM Journal on Scientific Computing
acknowledgement: ack-nhfb
affiliation: Department of Math., Manchester University, UK
journalURL: http://epubs.siam.org/sisc
thesaurus: Digital arithmetic; Error analysis
rawauthor: Nicholas J. Higham
rawtitle: The accuracy of floating point summation
URL:
http://citeseer.nj.nec.com/higham93accuracy.html; http://www.maths.man.ac.uk/~nareports/narep198.pdf; http://www.maths.man.ac.uk/~nareports/narep198.ps.gz

abstract:
The usual recursive summation technique is just one of several ways of computing the sum of $n$ floating point numbers. Five summation methods and their variations are analyzed. The accuracy of the methods is compared using rounding error analysis and numerical experiments. Four of the methods are shown to be special cases of a general class of methods, and an error analysis is given for this class. No one method is uniformly more accurate than the others, but some guidelines are given on the choice of method in particular cases.

keywords:
accurate floating-point summation; floating point numbers; numerical experiments; recursive summation technique; rounding error analysis

rawabstract:
The usual recursive summation technique is just one of several ways of computing the sum of $n$ floating point numbers. Five summation methods and their variations are analyzed. The accuracy of the methods is compared using rounding error analysis and numerical experiments. Four of the methods are shown to be special cases of a general class of methods, and an error analysis is given for this class. No one method is uniformly more accurate than the others, but some guidelines are given on the choice of method in particular cases.

entry:
@Article{Higham:1993:AFP,
  author =       "Nicholas J. Higham",
  title =        "The accuracy of floating point summation",
  journal =      j-SIAM-J-SCI-COMP,
  volume =       "14",
  number =       "4",
  pages =        "783--799",
  month =        jul,
  year =         "1993",
  CODEN =        "SJOCE3",
  DOI =          "https://doi.org/10.1137/0914050",
  ISSN =         "1064-8275 (print), 1095-7197 (electronic)",
  ISSN-L =       "1064-8275",
  MRclass =      "65G05 (65B10)",
  MRnumber =     "94a:65025",
  bibdate =      "Thu Aug 23 06:36:53 2001",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://citeseer.nj.nec.com/higham93accuracy.html;
                 http://www.maths.man.ac.uk/~nareports/narep198.pdf;
                 http://www.maths.man.ac.uk/~nareports/narep198.ps.gz",
  abstract =     "The usual recursive summation technique is just one of
                 several ways of computing the sum of $n$ floating point
                 numbers. Five summation methods and their variations
                 are analyzed. The accuracy of the methods is compared
                 using rounding error analysis and numerical
                 experiments. Four of the methods are shown to be
                 special cases of a general class of methods, and an
                 error analysis is given for this class. No one method
                 is uniformly more accurate than the others, but some
                 guidelines are given on the choice of method in
                 particular cases.",
  acknowledgement = ack-nhfb,
  affiliation =  "Department of Math., Manchester University, UK",
  classification = "C4110 (Error analysis in numerical methods); C5230
                 (Digital arithmetic methods)",
  fjournal =     "SIAM Journal on Scientific Computing",
  journal-URL =  "http://epubs.siam.org/sisc",
  keywords =     "accurate floating-point summation; floating point
                 numbers; numerical experiments; recursive summation
                 technique; rounding error analysis",
  thesaurus =    "Digital arithmetic; Error analysis",
}


bibtype: mastersthesis
filename: fparith.bib
label: Holler:1993:IFP
author: Paul T. Holler
title: Integrating a floating point unit into the AT&T Hobbit microprocessor
type: Thesis (M.S.)
school: Lehigh University
address: Bethlehem, PA, USA
pages: viii + 85
year: 1993
bibdate: Sat Feb 24 15:01:45 MST 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.02.24 15:01:45 MST
keywords: Floating-point arithmetic.; Microprocessors.
acknowledgement: ack-nhfb
rawauthor: Paul T. Holler
rawtitle: Integrating a floating point unit into the {AT\&T Hobbit} microprocessor
entry:
@MastersThesis{Holler:1993:IFP,
  author =       "Paul T. Holler",
  title =        "Integrating a floating point unit into the {AT\&T
                 Hobbit} microprocessor",
  type =         "Thesis ({M.S.})",
  school =       "Lehigh University",
  address =      "Bethlehem, PA, USA",
  pages =        "viii + 85",
  year =         "1993",
  bibdate =      "Sat Feb 24 15:01:45 MST 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "Floating-point arithmetic.; Microprocessors.",
}


bibtype: article
filename: fparith.bib
label: Hopkins:1993:CEM
author: Tim Hopkins and John Slater
title: A Comment on the Eispack Machine Epsilon Routine
journal: j-SIGNUM
volume: 28
number: 4
pages: 2--6
month: oct
monthnumber: 10
year: 1993
CODEN: SNEWD6
DOI: https://doi.org/10.1145/165639.165641
ISSN: 0163-5778 (print), 1558-0237 (electronic) OR 01635778 (print), 15580237 (electronic)
ISSNL: 0163-5778 OR 01635778
bibdate: Tue Apr 12 07:50:24 MDT 2005
bibsource: http://portal.acm.org/; https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.04.12 07:50:24 MDT
fjournal: ACM SIGNUM Newsletter
keywords: Binary floating-point system; Eispack machine epsilon routine
acknowledgement: ack-nhfb
affiliation: Comput. Lab., Kent University, Canterbury, UK
journalURL: http://portal.acm.org/browse_dl.cfm?idx=J690
thesaurus: Digital arithmetic
rawauthor: Tim Hopkins and John Slater
rawtitle: A Comment on the {Eispack} Machine Epsilon Routine
abstract:
The authors analyze the algorithm used to generate the value for the machine epsilon in the Eispack suite of routines and show that it can fail on a binary floating-point system. The comments in the code describing the conditions under which this method will work are not restrictive enough and the authors provide a replacement set of assumptions. They conclude by suggesting how the algorithm may be modified to overcome most of the shortcomings.

rawabstract:
The authors analyze the algorithm used to generate the value for the machine epsilon in the Eispack suite of routines and show that it can fail on a binary floating-point system. The comments in the code describing the conditions under which this method will work are not restrictive enough and the authors provide a replacement set of assumptions. They conclude by suggesting how the algorithm may be modified to overcome most of the shortcomings.

entry:
@Article{Hopkins:1993:CEM,
  author =       "Tim Hopkins and John Slater",
  title =        "A Comment on the {Eispack} Machine Epsilon Routine",
  journal =      j-SIGNUM,
  volume =       "28",
  number =       "4",
  pages =        "2--6",
  month =        oct,
  year =         "1993",
  CODEN =        "SNEWD6",
  DOI =          "https://doi.org/10.1145/165639.165641",
  ISSN =         "0163-5778 (print), 1558-0237 (electronic)",
  ISSN-L =       "0163-5778",
  bibdate =      "Tue Apr 12 07:50:24 MDT 2005",
  bibsource =    "http://portal.acm.org/;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "The authors analyze the algorithm used to generate the
                 value for the machine epsilon in the Eispack suite of
                 routines and show that it can fail on a binary
                 floating-point system. The comments in the code
                 describing the conditions under which this method will
                 work are not restrictive enough and the authors provide
                 a replacement set of assumptions. They conclude by
                 suggesting how the algorithm may be modified to
                 overcome most of the shortcomings.",
  acknowledgement = ack-nhfb # " and " # ack-nj,
  affiliation =  "Comput. Lab., Kent University, Canterbury, UK",
  classification = "C5230 (Digital arithmetic methods)",
  fjournal =     "ACM SIGNUM Newsletter",
  journal-URL =  "http://portal.acm.org/browse_dl.cfm?idx=J690",
  keywords =     "Binary floating-point system; Eispack machine epsilon
                 routine",
  thesaurus =    "Digital arithmetic",
}


bibtype: techreport
filename: fparith.bib
label: Horning:1993:SUM
author: Jim Horning and Bill Kalsow and Paul McJones and Greg Nelson
title: Some Useful Modula-3 Interfaces
type: Memo
number: 113
institution: Digital Equipment Corporation, Systems Research Center
address: Palo Alto, CA, USA
pages: 2--6
month: dec
monthnumber: 12
year: 1993
bibdate: Wed Jan 29 16:39:06 2003
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2003.01.29 16:39:06 ???
remark: From cite Steele:2004:RHP: ``The floating-point reader has been implemented in ldots to Modula-3''.
acknowledgement: ack-nhfb
rawauthor: Jim Horning and Bill Kalsow and Paul McJones and Greg Nelson
rawtitle: Some Useful {Modula-3} Interfaces
entry:
@TechReport{Horning:1993:SUM,
  author =       "Jim Horning and Bill Kalsow and Paul McJones and Greg
                 Nelson",
  title =        "Some Useful {Modula-3} Interfaces",
  type =         "Memo",
  number =       "113",
  institution =  "Digital Equipment Corporation, Systems Research
                 Center",
  address =      "Palo Alto, CA, USA",
  month =        dec,
  year =         "1993",
  bibdate =      "Wed Jan 29 16:39:06 2003",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  remark =       "From \cite{Steele:2004:RHP}: ``The floating-point
                 reader has been implemented in \ldots{} to
                 Modula-3''.",
}


bibtype: article
filename: fparith.bib
label: Hu:1993:EIS
author: X. Hu and S. C. Bass and R. G. Harber
journal: j-J-PAR-DIST-COMP
volume: 17
number: 4
pages: 360--362
month: apr
monthnumber: 4
year: 1993
CODEN: JPDCER
DOI: https://doi.org/10.1006/jpdc.1993.1034
ISSN: 0743-7315 (print), 1096-0848 (electronic) OR 07437315 (print), 10960848 (electronic)
ISSNL: 0743-7315 OR 07437315
bibdate: Thu Mar 9 09:18:52 MST 2000
bibtimestamp: 2000.03.09 09:18:52 MST
fjournal: Journal of Parallel and Distributed Computing
acknowledgement: ack-nhfb
corpsource: General Motors Res. Labs., Warren, MI, USA
journalURL: http://www.sciencedirect.com/science/journal/07437315
treatment: A Application; P Practical
rawauthor: X. Hu and S. C. Bass and R. G. Harber
title:
An Efficient Implementation of Singular Value Decomposition Rotation Transformations with CORDIC Processors

bibsource:
http://www.idealibrary.com/servlet/useragent?func=showAllIssues&curIssueID=jpdc; https://www.math.utah.edu/pub/tex/bib/fparith.bib

URL:
http://www.idealibrary.com/links/doi/10.1006/jpdc.1993.1034/production; http://www.idealibrary.com/links/doi/10.1006/jpdc.1993.1034/production/pdf

keywords:
2*2 matrices; CORDIC processors; digital arithmetic; mathematics computing; matrix algebra; singular value decomposition rotation transformations

rawtitle:
An Efficient Implementation of Singular Value Decomposition Rotation Transformations with {CORDIC} Processors

entry:
@Article{Hu:1993:EIS,
  author =       "X. Hu and S. C. Bass and R. G. Harber",
  title =        "An Efficient Implementation of Singular Value
                 Decomposition Rotation Transformations with {CORDIC}
                 Processors",
  journal =      j-J-PAR-DIST-COMP,
  volume =       "17",
  number =       "4",
  pages =        "360--362",
  month =        apr,
  year =         "1993",
  CODEN =        "JPDCER",
  DOI =          "https://doi.org/10.1006/jpdc.1993.1034",
  ISSN =         "0743-7315 (print), 1096-0848 (electronic)",
  ISSN-L =       "0743-7315",
  bibdate =      "Thu Mar 9 09:18:52 MST 2000",
  bibsource =    "http://www.idealibrary.com/servlet/useragent?func=showAllIssues&curIssueID=jpdc;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.idealibrary.com/links/doi/10.1006/jpdc.1993.1034/production;
                 http://www.idealibrary.com/links/doi/10.1006/jpdc.1993.1034/production/pdf",
  acknowledgement = ack-nhfb,
  classification = "C4140 (Linear algebra); C5230 (Digital arithmetic
                 methods); C7310 (Mathematics)",
  corpsource =   "General Motors Res. Labs., Warren, MI, USA",
  fjournal =     "Journal of Parallel and Distributed Computing",
  journal-URL =  "http://www.sciencedirect.com/science/journal/07437315",
  keywords =     "2*2 matrices; CORDIC processors; digital arithmetic;
                 mathematics computing; matrix algebra; singular value
                 decomposition rotation transformations",
  treatment =    "A Application; P Practical",
}


bibtype: book
filename: fparith.bib
label: IBM:1993:IPA
author: IBM Corporation
title: The IBM PowerPC Architecture: a New Family of RISC Processors
publisher: pub-MORGAN-KAUFMANN
address: pub-MORGAN-KAUFMANN:adr
pages: 360--362
year: 1993
ISBN: 1-55860-316-6 OR 1558603166
ISBN13: 978-1-55860-316-5 OR 9781558603165
LCCN: QA76.8.P67P68 1994
bibdate: Sat Oct 15 12:26:00 1994
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1994.10.15 12:26:00 ???
acknowledgement: ack-nhfb
rawauthor: {IBM Corporation}
rawtitle: The {IBM PowerPC} Architecture: a New Family of {RISC} Processors
entry:
@Book{IBM:1993:IPA,
  author =       "{IBM Corporation}",
  title =        "The {IBM PowerPC} Architecture: a New Family of {RISC}
                 Processors",
  publisher =    pub-MORGAN-KAUFMANN,
  address =      pub-MORGAN-KAUFMANN:adr,
  year =         "1993",
  ISBN =         "1-55860-316-6",
  ISBN-13 =      "978-1-55860-316-5",
  LCCN =         "QA76.8.P67P68 1994",
  bibdate =      "Sat Oct 15 12:26:00 1994",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  price =        "US\$49.95",
  acknowledgement = ack-nhfb,
}


bibtype: article
filename: fparith.bib
label: Ide:1993:CFP
title: A 320-MFLOPS CMOS Floating-Point Processing Unit for Superscalar Processors
journal: j-IEEE-J-SOLID-STATE-CIRCUITS
volume: 28
number: 3
pages: 352--361
month: mar
monthnumber: 3
year: 1993
CODEN: IJSCBC
ISSN: 0018-9200 (print), 1558-173X (electronic) OR 00189200 (print), 1558173X (electronic)
ISSNL: 0018-9200 OR 00189200
bibdate: Sat Feb 24 15:01:45 MST 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.02.24 15:01:45 MST
fjournal: IEEE Journal of Solid-State Circuits
acknowledgement: ack-nhfb
rawtitle: A {320-MFLOPS} {CMOS} Floating-Point Processing Unit for Superscalar Processors
author:
N. Ide and H. Fukuhisa and Y. Kondo and T. Yoshida and M. Nagamatsu and J. Mori and I. Yamazaki and K. Ueno

rawauthor:
N. Ide and H. Fukuhisa and Y. Kondo and T. Yoshida and M. Nagamatsu and J. Mori and I. Yamazaki and K. Ueno

entry:
@Article{Ide:1993:CFP,
  author =       "N. Ide and H. Fukuhisa and Y. Kondo and T. Yoshida and
                 M. Nagamatsu and J. Mori and I. Yamazaki and K. Ueno",
  title =        "A {320-MFLOPS} {CMOS} Floating-Point Processing Unit
                 for Superscalar Processors",
  journal =      j-IEEE-J-SOLID-STATE-CIRCUITS,
  volume =       "28",
  number =       "3",
  pages =        "352--361",
  month =        mar,
  year =         "1993",
  CODEN =        "IJSCBC",
  ISSN =         "0018-9200 (print), 1558-173X (electronic)",
  ISSN-L =       "0018-9200",
  bibdate =      "Sat Feb 24 15:01:45 MST 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "IEEE Journal of Solid-State Circuits",
}


bibtype: article
filename: fparith.bib
label: Ide:1993:MCF
title: A 320-MFLOPS CMOS Floating-Point Processing Unit for Superscalar Processors
journal: j-IEEE-J-SOLID-STATE-CIRCUITS
volume: 28
number: 3
pages: 352--361
month: mar
monthnumber: 3
year: 1993
CODEN: IJSCBC
ISSN: 0018-9200 (print), 1558-173X (electronic) OR 00189200 (print), 1558173X (electronic)
ISSNL: 0018-9200 OR 00189200
bibdate: Sat Jul 16 08:40:52 MDT 2005
bibsource: ftp://garbo.uwasa.fi/pc/doc-soft/fpbibl18.zip; https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.07.16 08:40:52 MDT
fjournal: IEEE Journal of Solid-State Circuits
acknowledgement: ack-nj
rawtitle: A 320-{MFLOPS CMOS} Floating-Point Processing Unit for Superscalar Processors
author:
Nobuhiro Ide and Hiroto Fukuhisa and Yoshihisa Kondo and Takeshi Yoshida and Masato Nagamatsu and Junji Mori and Itaru Yamazaki and Kiyoji Ueno

rawauthor:
Nobuhiro Ide and Hiroto Fukuhisa and Yoshihisa Kondo and Takeshi Yoshida and Masato Nagamatsu and Junji Mori and Itaru Yamazaki and Kiyoji Ueno

entry:
@Article{Ide:1993:MCF,
  author =       "Nobuhiro Ide and Hiroto Fukuhisa and Yoshihisa Kondo
                 and Takeshi Yoshida and Masato Nagamatsu and Junji Mori
                 and Itaru Yamazaki and Kiyoji Ueno",
  title =        "A 320-{MFLOPS CMOS} Floating-Point Processing Unit for
                 Superscalar Processors",
  journal =      j-IEEE-J-SOLID-STATE-CIRCUITS,
  volume =       "28",
  number =       "3",
  pages =        "352--361",
  month =        mar,
  year =         "1993",
  CODEN =        "IJSCBC",
  ISSN =         "0018-9200 (print), 1558-173X (electronic)",
  ISSN-L =       "0018-9200",
  bibdate =      "Sat Jul 16 08:40:52 MDT 2005",
  bibsource =    "ftp://garbo.uwasa.fi/pc/doc-soft/fpbibl18.zip;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nj # " and " # ack-nhfb,
  fjournal =     "IEEE Journal of Solid-State Circuits",
  summary =      "A CMOS pipelined floating-point processing unit (FPU)
                 for superscalar processors is described. It is
                 fabricated using a 0.5 $\mu$m CMOS triple-metal-layer
                 technology on a 61 mm 2 die. The FPU has two execution
                 modes to meet precise scientific computations and
                 real-time applications. It can start two FPU operations
                 in each cycle, and this achieves a peak performance of
                 160 MFLOPS double or single precision with an 80 MHz
                 clock. Furthermore, the original computation mode, twin
                 single-precision computation, double the peak
                 performance and delivers 320 MFLOPS single precision.
                 Its full bypass reduces the latency of operations,
                 including load and store, and achieves an effective
                 throughput even in nonvectorizable computations. An
                 out-of-order completion is provided by using a new
                 exception prediction method and a pipeline stall
                 technique.",
}


bibtype: article
filename: fparith.bib
label: Jahn:1993:LIF
author: K.-U. Jahn
title: Loop Invariants in Floating Point Algorithms. Schleifen-Invarianten in Gleitpunktalgorithmen
journal: j-COMPUTING
volume: 50
number: 3
pages: 255--264
year: 1993
CODEN: CMPTA2
ISSN: 0010-485X (print), 1436-5057 (electronic) OR 0010485X (print), 14365057 (electronic)
ISSNL: 0010-485X OR 0010485X
MRclass: 65G05 (65G10)
MRnumber: 94f:65052
bibdate: Sat Feb 24 15:01:45 MST 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.02.24 15:01:45 MST
fjournal: Computing: Archiv fur informatik und numerik
keywords: Directed roundings; Enclosure sets; Floating point algorithms; Loop conditions; Loop invariants
acknowledgement: ack-nhfb
journalURL: http://link.springer.com/journal/607
thesaurus: Program verification
rawauthor: K.-U. Jahn
rawtitle: Loop Invariants in Floating Point Algorithms. {Schleifen-Invarianten in Gleitpunktalgorithmen}
abstract:
It is shown that by using directed roundings with respect to enclosure sets for the exact values, the loop conditions and loop invariants of numerical algorithms can be generalized for computing in a discrete screen. It is possible to verify the received results. Thereby only inherent properties of the algorithms are used, which moreover guarantee that the loops terminate.

rawabstract:
It is shown that by using directed roundings with respect to enclosure sets for the exact values, the loop conditions and loop invariants of numerical algorithms can be generalized for computing in a discrete screen. It is possible to verify the received results. Thereby only inherent properties of the algorithms are used, which moreover guarantee that the loops terminate.

entry:
@Article{Jahn:1993:LIF,
  author =       "K.-U. Jahn",
  title =        "Loop Invariants in Floating Point Algorithms.
                 {Schleifen-Invarianten in Gleitpunktalgorithmen}",
  journal =      j-COMPUTING,
  volume =       "50",
  number =       "3",
  pages =        "255--264",
  year =         "1993",
  CODEN =        "CMPTA2",
  ISSN =         "0010-485X (print), 1436-5057 (electronic)",
  ISSN-L =       "0010-485X",
  MRclass =      "65G05 (65G10)",
  MRnumber =     "94f:65052",
  bibdate =      "Sat Feb 24 15:01:45 MST 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "It is shown that by using directed roundings with
                 respect to enclosure sets for the exact values, the
                 loop conditions and loop invariants of numerical
                 algorithms can be generalized for computing in a
                 discrete screen. It is possible to verify the received
                 results. Thereby only inherent properties of the
                 algorithms are used, which moreover guarantee that the
                 loops terminate.",
  acknowledgement = ack-nhfb,
  classification = "C4240P (Parallel programming and algorithm theory);
                 C6150G (Diagnostic, testing, debugging and evaluating
                 systems)",
  fjournal =     "Computing: Archiv f{\"u}r informatik und numerik",
  journal-URL =  "http://link.springer.com/journal/607",
  keywords =     "Directed roundings; Enclosure sets; Floating point
                 algorithms; Loop conditions; Loop invariants",
  pubcountry =   "Austria",
  thesaurus =    "Program verification",
}


bibtype: article
filename: fparith.bib
label: Jahn:1993:SIG
author: K.-U. Jahn
journal: j-COMPUTING
volume: 50
number: 3
pages: 255--264
month: sep
monthnumber: 9
year: 1993
CODEN: CMPTA2
ISSN: 0010-485X (print), 1436-5057 (electronic) OR 0010485X (print), 14365057 (electronic)
ISSNL: 0010-485X OR 0010485X
MRclass: 65G05 (65G10)
MRnumber: 94f:65052
bibdate: Mon Oct 11 20:38:38 MDT 1999
bibtimestamp: 1999.10.11 20:38:38 MDT
fjournal: Computing
keywords: Directed roundings; Enclosure sets; Floating point algorithms; Loop conditions; Loop invariants
language: German
acknowledgement: ack-nhfb
journalURL: http://link.springer.com/journal/607
thesaurus: Program verification
rawauthor: K.-U. Jahn
title:
Schleifen-Invarianten in Gleitpunktalgorithmen. (German) [Loop Invariants in Floating Point Algorithms]

bibsource:
http://springerlink.metapress.com/openurl.asp?genre=journal&issn=0010-485X; https://www.math.utah.edu/pub/tex/bib/computing.bib; https://www.math.utah.edu/pub/tex/bib/fparith.bib; MathSciNet database; OCLC Contents1st database

abstract:
It is shown that by using directed roundings with respect to enclosure sets for the exact values, the loop conditions and loop invariants of numerical algorithms can be generalized for computing in a discrete screen. It is possible to verify the received results. Thereby only inherent properties of the algorithms are used, which moreover guarantee that the loops terminate.

rawtitle:
{Schleifen-Invarianten in Gleitpunktalgorithmen}. ({German}) [{Loop} Invariants in Floating Point Algorithms]

entry:
@Article{Jahn:1993:SIG,
  author =       "K.-U. Jahn",
  title =        "{Schleifen-Invarianten in Gleitpunktalgorithmen}.
                 ({German}) [{Loop} Invariants in Floating Point
                 Algorithms]",
  journal =      j-COMPUTING,
  volume =       "50",
  number =       "3",
  pages =        "255--264",
  month =        sep,
  year =         "1993",
  CODEN =        "CMPTA2",
  ISSN =         "0010-485X (print), 1436-5057 (electronic)",
  ISSN-L =       "0010-485X",
  MRclass =      "65G05 (65G10)",
  MRnumber =     "94f:65052",
  bibdate =      "Mon Oct 11 20:38:38 MDT 1999",
  bibsource =    "http://springerlink.metapress.com/openurl.asp?genre=journal&issn=0010-485X;
                 https://www.math.utah.edu/pub/tex/bib/computing.bib;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 MathSciNet database; OCLC Contents1st database",
  abstract =     "It is shown that by using directed roundings with
                 respect to enclosure sets for the exact values, the
                 loop conditions and loop invariants of numerical
                 algorithms can be generalized for computing in a
                 discrete screen. It is possible to verify the received
                 results. Thereby only inherent properties of the
                 algorithms are used, which moreover guarantee that the
                 loops terminate.",
  acknowledgement = ack-nhfb,
  classification = "C4240P (Parallel programming and algorithm theory);
                 C6150G (Diagnostic, testing, debugging and evaluating
                 systems)",
  fjournal =     "Computing",
  journal-URL =  "http://link.springer.com/journal/607",
  keywords =     "Directed roundings; Enclosure sets; Floating point
                 algorithms; Loop conditions; Loop invariants",
  language =     "German",
  pubcountry =   "Austria",
  thesaurus =    "Program verification",
}


bibtype: inproceedings
filename: fparith.bib
label: Jebelean:1993:CSG
author: T. Jebelean
title: Comparing Several GCD Algorithms
crossref: Swartzlander:1993:SCA
pages: 180--185
month: jun
monthnumber: 6
year: 1993
bibdate: Wed Nov 14 18:46:15 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.14 18:46:15 ???
URL: http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Jebelean.pdf
keywords: ARITH-11
acknowledgement: ack-nhfb
rawauthor: T. Jebelean
rawtitle: Comparing Several {GCD} Algorithms
entry:
@InProceedings{Jebelean:1993:CSG,
  author =       "T. Jebelean",
  title =        "Comparing Several {GCD} Algorithms",
  crossref =     "Swartzlander:1993:SCA",
  pages =        "180--185",
  month =        jun,
  year =         "1993",
  bibdate =      "Wed Nov 14 18:46:15 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Jebelean.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-11",
}


bibtype: inproceedings
filename: fparith.bib
label: Jenkins:1993:CSL
author: W. K. Jenkins and B. A. Schnaufer and A. J. Mansen
crossref: Swartzlander:1993:SCA
pages: 28--35
year: 1993
bibdate: Sat Nov 17 09:46:07 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.17 09:46:07 ???
URL: http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Jenkins.pdf
keywords: ARITH-11
acknowledgement: ack-nhfb
rawauthor: W. K. Jenkins and B. A. Schnaufer and A. J. Mansen
title:
Combined System-Level Redundancy and Modular Arithmetic for Fault Tolerant Digital Signal Processing

rawtitle:
Combined System-Level Redundancy and Modular Arithmetic for Fault Tolerant Digital Signal Processing

entry:
@InProceedings{Jenkins:1993:CSL,
  author =       "W. K. Jenkins and B. A. Schnaufer and A. J. Mansen",
  title =        "Combined System-Level Redundancy and Modular
                 Arithmetic for Fault Tolerant Digital Signal
                 Processing",
  crossref =     "Swartzlander:1993:SCA",
  pages =        "28--35",
  year =         "1993",
  bibdate =      "Sat Nov 17 09:46:07 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Jenkins.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-11",
}


bibtype: article
filename: fparith.bib
label: Johnstone:1993:RNA
author: P. Johnstone and F. E. Petry
title: Rational number approximation in higher radix floating point systems
journal: j-COMPUT-MATH-APPL
volume: 25
number: 6
pages: 103--108
month: mar
monthnumber: 3
year: 1993
CODEN: CMAPDK
ISSN: 0898-1221 (print), 1873-7668 (electronic) OR 08981221 (print), 18737668 (electronic)
ISSNL: 0898-1221 OR 08981221
bibdate: Tue Dec 12 09:27:13 MST 1995
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1995.12.12 09:27:13 MST
fjournal: Computers and Mathematics with Applications
acknowledgement: ack-nhfb
affiliation: New Orleans Tech. Dev. Group, Telerate Systems Inc., LA, USA
journalURL: http://www.sciencedirect.com/science/journal/08981221
thesaurus: Digital arithmetic
rawauthor: P. Johnstone and F. E. Petry
rawtitle: Rational number approximation in higher radix floating point systems
abstract:
Mathematical researchers have long recognized that some bases offer some representational advantages in that they generate fewer nonterminate values when representing arbitrary rational numbers. While such results are true for abstract number systems, little attention has been paid to machine based computation and its finite resources. In the paper, such results are considered in an environment more typical of computer based models of number systems. Specifically, the authors consider the effect of the choice of floating point base on rational number approximation in systems which exhibit the typical characteristics of floating point representations-normalized encodings, limited exponent range and storage allocated in a fixed number of `bits' per datum. The frequency with which terminate and representable results can be expected is considered for binary, decimal, and other potentially interesting bases.

keywords:
Computer based models; decimal floating-point arithmetic; Floating point base; Floating point systems; Number systems; Rational number approximation

rawabstract:
Mathematical researchers have long recognized that some bases offer some representational advantages in that they generate fewer nonterminate values when representing arbitrary rational numbers. While such results are true for abstract number systems, little attention has been paid to machine based computation and its finite resources. In the paper, such results are considered in an environment more typical of computer based models of number systems. Specifically, the authors consider the effect of the choice of floating point base on rational number approximation in systems which exhibit the typical characteristics of floating point representations-normalized encodings, limited exponent range and storage allocated in a fixed number of `bits' per datum. The frequency with which terminate and representable results can be expected is considered for binary, decimal, and other potentially interesting bases.

entry:
@Article{Johnstone:1993:RNA,
  author =       "P. Johnstone and F. E. Petry",
  title =        "Rational number approximation in higher radix floating
                 point systems",
  journal =      j-COMPUT-MATH-APPL,
  volume =       "25",
  number =       "6",
  pages =        "103--108",
  month =        mar,
  year =         "1993",
  CODEN =        "CMAPDK",
  ISSN =         "0898-1221 (print), 1873-7668 (electronic)",
  ISSN-L =       "0898-1221",
  bibdate =      "Tue Dec 12 09:27:13 MST 1995",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "Mathematical researchers have long recognized that
                 some bases offer some representational advantages in
                 that they generate fewer nonterminate values when
                 representing arbitrary rational numbers. While such
                 results are true for abstract number systems, little
                 attention has been paid to machine based computation
                 and its finite resources. In the paper, such results
                 are considered in an environment more typical of
                 computer based models of number systems. Specifically,
                 the authors consider the effect of the choice of
                 floating point base on rational number approximation in
                 systems which exhibit the typical characteristics of
                 floating point representations-normalized encodings,
                 limited exponent range and storage allocated in a fixed
                 number of `bits' per datum. The frequency with which
                 terminate and representable results can be expected is
                 considered for binary, decimal, and other potentially
                 interesting bases.",
  acknowledgement = ack-nhfb,
  affiliation =  "New Orleans Tech. Dev. Group, Telerate Systems Inc.,
                 LA, USA",
  classification = "C5230 (Digital arithmetic methods)",
  fjournal =     "Computers and Mathematics with Applications",
  journal-URL =  "http://www.sciencedirect.com/science/journal/08981221",
  keywords =     "Computer based models; decimal floating-point
                 arithmetic; Floating point base; Floating point
                 systems; Number systems; Rational number
                 approximation",
  pubcountry =   "UK",
  thesaurus =    "Digital arithmetic",
}


bibtype: inproceedings
filename: fparith.bib
label: Ju:1993:WCB
author: Chwen-Jye Ju
title: What can block floating-point arithmetic do for DSP applications
crossref: Anonymous:1993:IPF
pages: 641--650 vol.1
year: 1993
bibdate: Tue Dec 12 09:29:07 MST 1995
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1995.12.12 09:29:07 MST
acknowledgement: ack-nhfb
affiliation: Sharp Microelectron. Technol. Inc., Camas, WA, USA
bookpages: 1675
rawauthor: Chwen-Jye Ju
rawtitle: What can block floating-point arithmetic do for {DSP} applications
abstract:
Block floating-point arithmetic for filtering was proposed by Oppenheim two decades ago. Although it has the advantages of both integer and floating-point arithmetic, it is scarcely used in DSP applications because the required signal reference level adjustment (scaling) usually offsets its advantages. To conquer the scaling problem, the unified indexing concept has been proposed by the author for the M-D FFT implementation. This paper will extend the concept to derive the general block-oriented block floating-point DSP algorithms. Therefore, the block floating-point processors such as the LH9124/LH9320 can provide self-contained solutions for some classes of DSP applications.

keywords:
Block floating-point arithmetic; Block floating-point processors; DSP applications; General block-oriented block floating-point DSP algorithms; LH9124/LH9320; M-D FFT implementation; Oppenheim; Scaling problem; Signal reference level adjustment; Unified indexing concept

thesaurus:
Array signal processing; Digital arithmetic; Digital filters; Digital signal processing chips; Fast Fourier transforms

rawabstract:
Block floating-point arithmetic for filtering was proposed by Oppenheim two decades ago. Although it has the advantages of both integer and floating-point arithmetic, it is scarcely used in DSP applications because the required signal reference level adjustment (scaling) usually offsets its advantages. To conquer the scaling problem, the unified indexing concept has been proposed by the author for the M-D FFT implementation. This paper will extend the concept to derive the general block-oriented block floating-point DSP algorithms. Therefore, the block floating-point processors such as the LH9124/LH9320 can provide self-contained solutions for some classes of DSP applications.

entry:
@InProceedings{Ju:1993:WCB,
  author =       "Chwen-Jye Ju",
  title =        "What can block floating-point arithmetic do for {DSP}
                 applications",
  crossref =     "Anonymous:1993:IPF",
  bookpages =    "1675",
  pages =        "641--650 vol.1",
  year =         "1993",
  bibdate =      "Tue Dec 12 09:29:07 MST 1995",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "Block floating-point arithmetic for filtering was
                 proposed by Oppenheim two decades ago. Although it has
                 the advantages of both integer and floating-point
                 arithmetic, it is scarcely used in DSP applications
                 because the required signal reference level adjustment
                 (scaling) usually offsets its advantages. To conquer
                 the scaling problem, the unified indexing concept has
                 been proposed by the author for the M-D FFT
                 implementation. This paper will extend the concept to
                 derive the general block-oriented block floating-point
                 DSP algorithms. Therefore, the block floating-point
                 processors such as the LH9124/LH9320 can provide
                 self-contained solutions for some classes of DSP
                 applications.",
  acknowledgement = ack-nhfb,
  affiliation =  "Sharp Microelectron. Technol. Inc., Camas, WA, USA",
  classification = "B1265F (Microprocessors and microcomputers); B6140
                 (Signal processing and detection); C5135 (Digital
                 signal processing chips); C5230 (Digital arithmetic
                 methods); C5260 (Digital signal processing)",
  keywords =     "Block floating-point arithmetic; Block floating-point
                 processors; DSP applications; General block-oriented
                 block floating-point DSP algorithms; LH9124/LH9320; M-D
                 FFT implementation; Oppenheim; Scaling problem; Signal
                 reference level adjustment; Unified indexing concept",
  thesaurus =    "Array signal processing; Digital arithmetic; Digital
                 filters; Digital signal processing chips; Fast Fourier
                 transforms",
}


bibtype: techreport
filename: fparith.bib
label: Karp:1993:HPD
author: A. H. Karp and P. Markstein
title: High precision division and square root
number: HPL-93-42
institution: Hewlett--Packard Lab.
address: Palo Alto, CA, USA
pages: 20
month: jun
monthnumber: 6
year: 1993
bibdate: Tue Dec 12 09:27:13 MST 1995
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1995.12.12 09:27:13 MST
keywords: Division; Floating point hardware; Square root algorithms
acknowledgement: ack-nhfb
thesaurus: Digital arithmetic
rawauthor: A. H. Karp and P. Markstein
rawtitle: High precision division and square root
abstract:
The authors present division and square root algorithms for calculations with more bits than are handled by the floating point hardware. These algorithms avoid the need to multiply two high precision numbers, speeding up the last iteration by as much as a factor of ten.

rawabstract:
The authors present division and square root algorithms for calculations with more bits than are handled by the floating point hardware. These algorithms avoid the need to multiply two high precision numbers, speeding up the last iteration by as much as a factor of ten.

entry:
@TechReport{Karp:1993:HPD,
  author =       "A. H. Karp and P. Markstein",
  title =        "High precision division and square root",
  number =       "HPL-93-42",
  institution =  "Hewlett--Packard Lab.",
  address =      "Palo Alto, CA, USA",
  pages =        "20",
  month =        jun,
  year =         "1993",
  bibdate =      "Tue Dec 12 09:27:13 MST 1995",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "The authors present division and square root
                 algorithms for calculations with more bits than are
                 handled by the floating point hardware. These
                 algorithms avoid the need to multiply two high
                 precision numbers, speeding up the last iteration by as
                 much as a factor of ten.",
  acknowledgement = ack-nhfb,
  classification = "C5230 (Digital arithmetic methods)",
  keywords =     "Division; Floating point hardware; Square root
                 algorithms",
  thesaurus =    "Digital arithmetic",
}


bibtype: inproceedings
filename: fparith.bib
label: Kim:1993:FABa
author: S. W. Kim and T. Stouraitis and A. Skavantzos
booktitle: IEEE International Symposium on Circuits and Systems, ISCAS '93, 3--6 May 1993
title: Full adder-based inner product step processors for residue and quadratic residue number systems
volume: 3
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 1821--1824
year: 1993
DOI: https://doi.org/10.1109/ISCAS.1993.394100
bibdate: Fri Nov 9 11:38:58 MST 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.09 11:38:58 MST
keywords: residue arithmetic; residue number system
acknowledgement: ack-nhfb
rawauthor: S. W. Kim and T. Stouraitis and A. Skavantzos
rawbooktitle: {IEEE} International Symposium on Circuits and Systems, {ISCAS '93}, 3--6 May 1993
rawtitle: Full adder-based inner product step processors for residue and quadratic residue number systems
entry:
@InProceedings{Kim:1993:FABa,
  author =       "S. W. Kim and T. Stouraitis and A. Skavantzos",
  booktitle =    "{IEEE} International Symposium on Circuits and
                 Systems, {ISCAS '93}, 3--6 May 1993",
  title =        "Full adder-based inner product step processors for
                 residue and quadratic residue number systems",
  volume =       "3",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "1821--1824",
  year =         "1993",
  CODEN =        "????",
  DOI =          "https://doi.org/10.1109/ISCAS.1993.394100",
  ISSN =         "????",
  bibdate =      "Fri Nov 9 11:38:58 MST 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "residue arithmetic; residue number system",
  summary =      "A full adder-based arithmetic unit of a modulus $m$,
                 called an FA-based AU$_m$, is proposed. It performs
                 both addition and multiplication at the same time.
                 Since the proposed AU$_m$'s use full adders as their
                 basic units, they lead to modular and regular designs
                 which result in lower cost and easier implementation in
                 VLSI.",
}


bibtype: inproceedings
filename: fparith.bib
label: Kim:1993:FABb
author: Seon Wook Kim and T. Stouraitis and A. Skavantzos
booktitle: IEEE International Symposium on Circuits and Systems, ISCAS '93, 3--6 May 1993
title: Full adder-based inner product step processors for residue and quadratic residue number systems
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 1821--1824
year: 1993
DOI: https://doi.org/10.1109/EDAC.1993.386412
bibdate: Fri Nov 9 11:38:58 MST 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.09 11:38:58 MST
keywords: residue arithmetic; residue number system
acknowledgement: ack-nhfb
rawauthor: Seon Wook Kim and T. Stouraitis and A. Skavantzos
rawbooktitle: {IEEE} International Symposium on Circuits and Systems, {ISCAS '93}, 3--6 May 1993
rawtitle: Full adder-based inner product step processors for residue and quadratic residue number systems
entry:
@InProceedings{Kim:1993:FABb,
  author =       "Seon Wook Kim and T. Stouraitis and A. Skavantzos",
  booktitle =    "{IEEE} International Symposium on Circuits and
                 Systems, {ISCAS '93}, 3--6 May 1993",
  title =        "Full adder-based inner product step processors for
                 residue and quadratic residue number systems",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "1821--1824",
  year =         "1993",
  CODEN =        "????",
  DOI =          "https://doi.org/10.1109/EDAC.1993.386412",
  ISSN =         "????",
  bibdate =      "Fri Nov 9 11:38:58 MST 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "residue arithmetic; residue number system",
}


bibtype: inproceedings
filename: fparith.bib
label: Kim:1993:FABc
author: S. W. Kim and T. Stouraitis and A. Skavantzos
booktitle: IEEE International Symposium on Circuits and Systems, ISCAS '93, 3--6 May 1993
title: Full adder-based inner product step processors for residue and quadratic residue number systems
volume: 3
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 1821--1824
year: 1993
DOI: https://doi.org/10.1109/ISCAS.1993.394100
bibdate: Fri Nov 9 11:38:58 MST 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.09 11:38:58 MST
keywords: residue arithmetic; residue number system
acknowledgement: ack-nhfb
rawauthor: S. W. Kim and T. Stouraitis and A. Skavantzos
rawbooktitle: {IEEE} International Symposium on Circuits and Systems, {ISCAS '93}, 3--6 May 1993
rawtitle: Full adder-based inner product step processors for residue and quadratic residue number systems
entry:
@InProceedings{Kim:1993:FABc,
  author =       "S. W. Kim and T. Stouraitis and A. Skavantzos",
  booktitle =    "{IEEE} International Symposium on Circuits and
                 Systems, {ISCAS '93}, 3--6 May 1993",
  title =        "Full adder-based inner product step processors for
                 residue and quadratic residue number systems",
  volume =       "3",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "1821--1824",
  year =         "1993",
  CODEN =        "????",
  DOI =          "https://doi.org/10.1109/ISCAS.1993.394100",
  ISSN =         "????",
  bibdate =      "Fri Nov 9 11:38:58 MST 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "residue arithmetic; residue number system",
  summary =      "A full adder-based arithmetic unit of a modulus m,
                 called an FA-based AU m, is proposed. It performs both
                 addition and multiplication at the same time. Since the
                 proposed AU m's use full adders as their basic units,
                 they \ldots{}",
}


bibtype: inproceedings
filename: fparith.bib
label: Kim:1993:FABd
author: Seon Wook Kim and T. Stouraitis and A. Skavantzos
booktitle: IEEE International Symposium on Circuits and Systems, ISCAS '93, 3--6 May 1993
title: Full adder-based inner product step processors for residue and quadratic residue number systems
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 1821--1824
year: 1993
DOI: https://doi.org/10.1109/EDAC.1993.386412
bibdate: Fri Nov 9 11:38:58 MST 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.09 11:38:58 MST
keywords: residue arithmetic; residue number system
acknowledgement: ack-nhfb
rawauthor: Seon Wook Kim and T. Stouraitis and A. Skavantzos
rawbooktitle: {IEEE} International Symposium on Circuits and Systems, {ISCAS '93}, 3--6 May 1993
rawtitle: Full adder-based inner product step processors for residue and quadratic residue number systems
entry:
@InProceedings{Kim:1993:FABd,
  author =       "Seon Wook Kim and T. Stouraitis and A. Skavantzos",
  booktitle =    "{IEEE} International Symposium on Circuits and
                 Systems, {ISCAS '93}, 3--6 May 1993",
  title =        "Full adder-based inner product step processors for
                 residue and quadratic residue number systems",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "1821--1824",
  year =         "1993",
  CODEN =        "????",
  DOI =          "https://doi.org/10.1109/EDAC.1993.386412",
  ISSN =         "????",
  bibdate =      "Fri Nov 9 11:38:58 MST 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "residue arithmetic; residue number system",
}


bibtype: inproceedings
filename: fparith.bib
label: Kirsch:1993:ABU
author: Bary J. Kirsch and Peter R. Turner
title: Adaptive Beamforming Using RNS Arithmetic
crossref: Swartzlander:1993:SCA
pages: 36--43
year: 1993
bibdate: Sat Nov 17 09:46:07 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.17 09:46:07 ???
URL: http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Kirsch.pdf
keywords: ARITH-11; residue number system
acknowledgement: ack-nhfb
rawauthor: Bary J. Kirsch and Peter R. Turner
rawtitle: Adaptive Beamforming Using {RNS} Arithmetic
entry:
@InProceedings{Kirsch:1993:ABU,
  author =       "Bary J. Kirsch and Peter R. Turner",
  title =        "Adaptive Beamforming Using {RNS} Arithmetic",
  crossref =     "Swartzlander:1993:SCA",
  pages =        "36--43",
  year =         "1993",
  bibdate =      "Sat Nov 17 09:46:07 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Kirsch.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-11; residue number system",
}


bibtype: book
filename: fparith.bib
label: Klatte:1993:CXC
editor: Rudi Klatte and Ulrich Kulisch and Christian Lawo and Michael Rauch and Andreas Wiethoff
title: C-XSC: a C++ class library for extended scientific computing
publisher: pub-SV
address: pub-SV:adr
pages: xii + 269
year: 1993
ISBN: 3-540-56328-8 (Berlin), 0-387-56328-8 (New York) OR 3540563288 (Berlin), 0387563288 (New York)
LCCN: QA76.73.C153 C9 1993
bibdate: Fri Jun 24 20:05:29 MDT 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; z3950.loc.gov:7090/Voyager
bibtimestamp: 2005.06.24 20:05:29 MDT
remark: This book is a translation of an unpublished German manuscript.
acknowledgement: ack-nhfb
raweditor: Rudi Klatte and Ulrich Kulisch and Christian Lawo and Michael Rauch and Andreas Wiethoff
rawtitle: {C-XSC}: a {C++} class library for extended scientific computing
ISBN13:
978-3-540-56328-0 (Berlin), 978-0-387-56328-2 (New York) OR 9783540563280 (Berlin), 9780387563282 (New York)

abstract:
C-XSC is a tool for the development of numerical algorithms delivering highly accurate and automatically verified results. It provides a large number of predefined numerical data types and operators. These types are implemented as C++ classes. Thus, C-XSC allows high-level programming of numerical applications in C and C++. The most important features of C-XSC are: real, complex, interval, and complex interval arithmetic; dynamic vectors and matrices; subarrays of vectors and matrices; dotprecision data types, predefined arithmetic operators with maximum accuracy; standard functions of high accuracy; multiple precision arithmetic and standard functions; rounding control for I/O data; error handling, and library of problem solving routines with automatic result verification. Thus, C-XSC makes the computer more powerful concerning the arithmetic. C-XSC is immediately usable by C programmers, easy to learn, user-extendable, and may also be combined with other tools. The book can be used as a textbook and as a reference manual. It consists of an introduction to advanced computer arithmetic, a chapter describing the programming languages C and C++, the major chapter ``C-XSC Reference'', sample programs, and indices.

subject:
C++ (Computer program language); C-XSC; Mathematics; Numerical analysis; Mathematics.; Numerical analysis.

TOC:
1 Introduction 1.1 Typography 1.2 C-XSC: A Class Library in the Programming Language C++ 1.3 C-XSC: A Programming Environment for Scientific Computing with Result Verification 1.4 Survey of C-XSC 2 The Programming Languages C and C++ 2.1 A Short Introduction to C 2.2 Additional Features in C++ 3 C-XSC Reference 3.1 Constants, Data Types, and Variables 3.2 Expressions 3.3 Statements 3.4 Error Handling 3.5 Pitfalls for Programming with C XSC A Syntax Diagrams A.1 Data Types A.2 Management of Vectors and Matrices A.3 Definition of Variables A.4 Expressions A.5 Logical Expressions A.6 Type Castings A.7 Assignments A.8 Arithmetic Standard Functions A.9 Other Functions A.10 Input and Output A.11 Extension of a Syntax Diagram of C++ B The Structure of the C-XSC Package B.1 Header Files B.2 Module Libraries C Error List D Sample Programs D.1 Rounding Control of Arithmetic Operations D.2 Rounding Control of Input and Output D.3 Scalar Product D.4 Transpose of a Matrix D.5 Trace of a Product Matrix D.6 Inverse of a Matrix D.7 Multiple-Precision Arithmetic D.8 Interval Newton Method D.9 Runge-Kutta Method D.10 Complex Polynomial Arithmetic D.11 Automatic Differentiation E Scientific Computation with Verified Results E.1 Evaluation of Polynomials E.2 Matrix Inversion E.3 Linear Systems of Equations E.4 Eigenvalues of Symmetric Matrices E.5 Fast Fourier Transform E.6 Zeros of a Nonlinear Equation E.7 System of Nonlinear Equations E.8 Ordinary Differential Equations

rawabstract:
C-XSC is a tool for the development of numerical algorithms delivering highly accurate and automatically verified results. It provides a large number of predefined numerical data types and operators. These types are implemented as C++ classes. Thus, C-XSC allows high-level programming of numerical applications in C and C++. The most important features of C-XSC are: real, complex, interval, and complex interval arithmetic; dynamic vectors and matrices; subarrays of vectors and matrices; dotprecision data types, predefined arithmetic operators with maximum accuracy; standard functions of high accuracy; multiple precision arithmetic and standard functions; rounding control for I/O data; error handling, and library of problem solving routines with automatic result verification. Thus, C-XSC makes the computer more powerful concerning the arithmetic. C-XSC is immediately usable by C programmers, easy to learn, user-extendable, and may also be combined with other tools. The book can be used as a textbook and as a reference manual. It consists of an introduction to advanced computer arithmetic, a chapter describing the programming languages C and C++, the major chapter ``C-XSC Reference'', sample programs, and indices.

rawTOC:
1 Introduction \\ 1.1 Typography \\ 1.2 C-XSC: A Class Library in the Programming Language C++ \\ 1.3 C-XSC: A Programming Environment for Scientific Computing with Result Verification \\ 1.4 Survey of C-XSC \\ 2 The Programming Languages C and C++ \\ 2.1 A Short Introduction to C \\ 2.2 Additional Features in C++ \\ 3 C-XSC Reference \\ 3.1 Constants, Data Types, and Variables \\ 3.2 Expressions \\ 3.3 Statements \\ 3.4 Error Handling \\ 3.5 Pitfalls for Programming with C XSC \\ A Syntax Diagrams \\ A.1 Data Types \\ A.2 Management of Vectors and Matrices \\ A.3 Definition of Variables \\ A.4 Expressions \\ A.5 Logical Expressions \\ A.6 Type Castings \\ A.7 Assignments \\ A.8 Arithmetic Standard Functions \\ A.9 Other Functions \\ A.10 Input and Output \\ A.11 Extension of a Syntax Diagram of C++ \\ B The Structure of the C-XSC Package \\ B.1 Header Files \\ B.2 Module Libraries \\ C Error List \\ D Sample Programs \\ D.1 Rounding Control of Arithmetic Operations \\ D.2 Rounding Control of Input and Output \\ D.3 Scalar Product \\ D.4 Transpose of a Matrix \\ D.5 Trace of a Product Matrix \\ D.6 Inverse of a Matrix \\ D.7 Multiple-Precision Arithmetic \\ D.8 Interval Newton Method \\ D.9 Runge-Kutta Method \\ D.10 Complex Polynomial Arithmetic \\ D.11 Automatic Differentiation \\ E Scientific Computation with Verified Results \\ E.1 Evaluation of Polynomials \\ E.2 Matrix Inversion \\ E.3 Linear Systems of Equations \\ E.4 Eigenvalues of Symmetric Matrices \\ E.5 Fast Fourier Transform \\ E.6 Zeros of a Nonlinear Equation \\ E.7 System of Nonlinear Equations \\ E.8 Ordinary Differential Equations

entry:
@Book{Klatte:1993:CXC,
  editor =       "Rudi Klatte and Ulrich Kulisch and Christian Lawo and
                 Michael Rauch and Andreas Wiethoff",
  title =        "{C-XSC}: a {C++} class library for extended scientific
                 computing",
  publisher =    pub-SV,
  address =      pub-SV:adr,
  pages =        "xii + 269",
  year =         "1993",
  ISBN =         "3-540-56328-8 (Berlin), 0-387-56328-8 (New York)",
  ISBN-13 =      "978-3-540-56328-0 (Berlin), 978-0-387-56328-2 (New
                 York)",
  LCCN =         "QA76.73.C153 C9 1993",
  bibdate =      "Fri Jun 24 20:05:29 MDT 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 z3950.loc.gov:7090/Voyager",
  price =        "DM74.00",
  abstract =     "C-XSC is a tool for the development of numerical
                 algorithms delivering highly accurate and automatically
                 verified results. It provides a large number of
                 predefined numerical data types and operators. These
                 types are implemented as C++ classes. Thus, C-XSC
                 allows high-level programming of numerical applications
                 in C and C++. The most important features of C-XSC are:
                 real, complex, interval, and complex interval
                 arithmetic; dynamic vectors and matrices; subarrays of
                 vectors and matrices; dotprecision data types,
                 predefined arithmetic operators with maximum accuracy;
                 standard functions of high accuracy; multiple precision
                 arithmetic and standard functions; rounding control for
                 I/O data; error handling, and library of problem
                 solving routines with automatic result verification.
                 Thus, C-XSC makes the computer more powerful concerning
                 the arithmetic. C-XSC is immediately usable by C
                 programmers, easy to learn, user-extendable, and may
                 also be combined with other tools. The book can be used
                 as a textbook and as a reference manual. It consists of
                 an introduction to advanced computer arithmetic, a
                 chapter describing the programming languages C and C++,
                 the major chapter ``C-XSC Reference'', sample programs,
                 and indices.",
  acknowledgement = ack-nhfb,
  remark =       "This book is a translation of an unpublished German
                 manuscript.",
  subject =      "C++ (Computer program language); C-XSC; Mathematics;
                 Numerical analysis; Mathematics.; Numerical analysis.",
  tableofcontents = "1 Introduction \\
                 1.1 Typography \\
                 1.2 C-XSC: A Class Library in the Programming Language
                 C++ \\
                 1.3 C-XSC: A Programming Environment for Scientific
                 Computing with Result Verification \\
                 1.4 Survey of C-XSC \\
                 2 The Programming Languages C and C++ \\
                 2.1 A Short Introduction to C \\
                 2.2 Additional Features in C++ \\
                 3 C-XSC Reference \\
                 3.1 Constants, Data Types, and Variables \\
                 3.2 Expressions \\
                 3.3 Statements \\
                 3.4 Error Handling \\
                 3.5 Pitfalls for Programming with C XSC \\
                 A Syntax Diagrams \\
                 A.1 Data Types \\
                 A.2 Management of Vectors and Matrices \\
                 A.3 Definition of Variables \\
                 A.4 Expressions \\
                 A.5 Logical Expressions \\
                 A.6 Type Castings \\
                 A.7 Assignments \\
                 A.8 Arithmetic Standard Functions \\
                 A.9 Other Functions \\
                 A.10 Input and Output \\
                 A.11 Extension of a Syntax Diagram of C++ \\
                 B The Structure of the C-XSC Package \\
                 B.1 Header Files \\
                 B.2 Module Libraries \\
                 C Error List \\
                 D Sample Programs \\
                 D.1 Rounding Control of Arithmetic Operations \\
                 D.2 Rounding Control of Input and Output \\
                 D.3 Scalar Product \\
                 D.4 Transpose of a Matrix \\
                 D.5 Trace of a Product Matrix \\
                 D.6 Inverse of a Matrix \\
                 D.7 Multiple-Precision Arithmetic \\
                 D.8 Interval Newton Method \\
                 D.9 Runge-Kutta Method \\
                 D.10 Complex Polynomial Arithmetic \\
                 D.11 Automatic Differentiation \\
                 E Scientific Computation with Verified Results \\
                 E.1 Evaluation of Polynomials \\
                 E.2 Matrix Inversion \\
                 E.3 Linear Systems of Equations \\
                 E.4 Eigenvalues of Symmetric Matrices \\
                 E.5 Fast Fourier Transform \\
                 E.6 Zeros of a Nonlinear Equation \\
                 E.7 System of Nonlinear Equations \\
                 E.8 Ordinary Differential Equations",
}


bibtype: book
filename: fparith.bib
label: Koren:1993:CAA
author: Israel Koren
title: Computer Arithmetic Algorithms
publisher: pub-PH
address: pub-PH:adr
pages: xiii + 210
year: 1993
ISBN: 0-13-151952-2 OR 0131519522
ISBN13: 978-0-13-151952-7 OR 9780131519527
LCCN: 76.9.C62 K67 1993
bibdate: Thu Sep 1 10:12:51 1994
bibsource: ftp://garbo.uwasa.fi/pc/doc-soft/fpbibl18.zip; https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1994.09.01 10:12:51 ???
acknowledgement: ack-nj
rawauthor: Israel Koren
rawtitle: Computer Arithmetic Algorithms
entry:
@Book{Koren:1993:CAA,
  author =       "Israel Koren",
  title =        "Computer Arithmetic Algorithms",
  publisher =    pub-PH,
  address =      pub-PH:adr,
  pages =        "xiii + 210",
  year =         "1993",
  ISBN =         "0-13-151952-2",
  ISBN-13 =      "978-0-13-151952-7",
  LCCN =         "76.9.C62 K67 1993",
  bibdate =      "Thu Sep 1 10:12:51 1994",
  bibsource =    "ftp://garbo.uwasa.fi/pc/doc-soft/fpbibl18.zip;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nj,
}


bibtype: inproceedings
filename: fparith.bib
label: Kornerup:1993:HRM
author: Peter Kornerup
title: High-Radix Modular Multiplication for Cryptosystems
crossref: Swartzlander:1993:SCA
pages: 277--283
year: 1993
bibdate: Wed Nov 14 18:46:45 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.14 18:46:45 ???
URL: http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Kornerup.pdf
keywords: ARITH-11
acknowledgement: ack-nhfb
rawauthor: Peter Kornerup
rawtitle: High-Radix Modular Multiplication for Cryptosystems
entry:
@InProceedings{Kornerup:1993:HRM,
  author =       "Peter Kornerup",
  title =        "High-Radix Modular Multiplication for Cryptosystems",
  crossref =     "Swartzlander:1993:SCA",
  pages =        "277--283",
  year =         "1993",
  bibdate =      "Wed Nov 14 18:46:45 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Kornerup.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-11",
}


bibtype: book
filename: fparith.bib
label: Kortemeyer:1993:CPT
author: Gerd Kortemeyer and others
publisher: pub-IWT
address: pub-IWT:adr
pages: 391
year: 1993
ISBN: 3-88322-439-1 OR 3883224391
ISBN13: 978-3-88322-439-8 OR 9783883224398
bibdate: Mon Sep 16 17:08:22 2002
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2002.09.16 17:08:22 ???
acknowledgement: ack-nj
rawauthor: Gerd Kortemeyer and others
title:
Coprozessoren Programmierung mit Turbo Pascal und C++: eine grundlegende Einfuhrung in die mathematischen Coprozessoren ab 80387 und deren Programmierung toenglish Coprocessor Programming with Turbo Pascal and C++relax endtoenglish 

rawtitle:
{Coprozessoren Programmierung mit Turbo Pascal und C++: eine grundlegende Einf{\"u}hrung in die mathematischen Coprozessoren ab 80387 und deren Programmierung} \toenglish Coprocessor Programming with {Turbo Pascal} and {C++}\relax \endtoenglish

entry:
@Book{Kortemeyer:1993:CPT,
  author =       "Gerd Kortemeyer and others",
  title =        "{Coprozessoren Programmierung mit Turbo Pascal und
                 C++: eine grundlegende Einf{\"u}hrung in die
                 mathematischen Coprozessoren ab 80387 und deren
                 Programmierung} \toenglish Coprocessor Programming with
                 {Turbo Pascal} and {C++}\relax \endtoenglish",
  publisher =    pub-IWT,
  address =      pub-IWT:adr,
  pages =        "391",
  year =         "1993",
  ISBN =         "3-88322-439-1",
  ISBN-13 =      "978-3-88322-439-8",
  LCCN =         "????",
  bibdate =      "Mon Sep 16 17:08:22 2002",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nj,
}


bibtype: article
filename: fparith.bib
label: Kota:1993:NAH
author: K. Kota and J. R. Cavallaro
title: Numerical Accuracy and Hardware Tradeoffs for CORDIC Arithmetic for Special-Purpose Processors
journal: j-IEEE-TRANS-COMPUT
volume: 42
number: 7
pages: 769--779
month: jul
monthnumber: 7
year: 1993
CODEN: ITCOB4
DOI: https://doi.org/10.1109/12.237718
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Thu Jul 7 07:58:50 MDT 2011
bibtimestamp: 2011.07.07 07:58:50 MDT
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=237718
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nj
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: K. Kota and J. R. Cavallaro
rawtitle: Numerical Accuracy and Hardware Tradeoffs for {CORDIC} Arithmetic for Special-Purpose Processors
entry:
@Article{Kota:1993:NAH,
  author =       "K. Kota and J. R. Cavallaro",
  title =        "Numerical Accuracy and Hardware Tradeoffs for {CORDIC}
                 Arithmetic for Special-Purpose Processors",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "42",
  number =       "7",
  pages =        "769--779",
  month =        jul,
  year =         "1993",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/12.237718",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Thu Jul 7 07:58:50 MDT 2011",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput1990.bib",
  URL =          "http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=237718",
  acknowledgement = ack-nj # "\slash " # ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
}


bibtype: inproceedings
filename: fparith.bib
label: Krandick:1993:EMF
author: Werner Krandick and Jeremy R. Johnson
title: Efficient multiprecision floating point multiplication with optimal directional rounding
crossref: Swartzlander:1993:SCA
pages: 228--233
year: 1993
bibdate: Thu Dec 14 11:25:18 MST 1995
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1995.12.14 11:25:18 MST
URL: http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Krandick.pdf
acknowledgement: ack-nhfb
affiliation: Res. Inst. for Symbolic Comput., Johannes Kepler University, Linz, Austria
thesaurus: Floating point arithmetic
rawauthor: Werner Krandick and Jeremy R. Johnson
rawtitle: Efficient multiprecision floating point multiplication with optimal directional rounding
abstract:
An algorithm is described for multiplying multiprecision floating-point numbers. The algorithm can produce either the smallest floating-point number greater than or equal to the true product, or the greatest floating-point number smaller than or equal to the true product. Software implementations of multiprecision floating-point multiplication can reduce the computation time by a factor of two if they do not compute the low-order digits of the product of the two mantissas. However, these algorithms do not necessarily provide optimally rounded results. The algorithms described here is guaranteed to produce optimally rounded results and typically obtains the same savings.

keywords:
ARITH-11; Floating-point numbers; Multiprecision floating point multiplication; Optimal directional rounding; Optimally rounded results

rawabstract:
An algorithm is described for multiplying multiprecision floating-point numbers. The algorithm can produce either the smallest floating-point number greater than or equal to the true product, or the greatest floating-point number smaller than or equal to the true product. Software implementations of multiprecision floating-point multiplication can reduce the computation time by a factor of two if they do not compute the low-order digits of the product of the two mantissas. However, these algorithms do not necessarily provide optimally rounded results. The algorithms described here is guaranteed to produce optimally rounded results and typically obtains the same savings.

entry:
@InProceedings{Krandick:1993:EMF,
  author =       "Werner Krandick and Jeremy R. Johnson",
  title =        "Efficient multiprecision floating point multiplication
                 with optimal directional rounding",
  crossref =     "Swartzlander:1993:SCA",
  pages =        "228--233",
  year =         "1993",
  bibdate =      "Thu Dec 14 11:25:18 MST 1995",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Krandick.pdf",
  abstract =     "An algorithm is described for multiplying
                 multiprecision floating-point numbers. The algorithm
                 can produce either the smallest floating-point number
                 greater than or equal to the true product, or the
                 greatest floating-point number smaller than or equal to
                 the true product. Software implementations of
                 multiprecision floating-point multiplication can reduce
                 the computation time by a factor of two if they do not
                 compute the low-order digits of the product of the two
                 mantissas. However, these algorithms do not necessarily
                 provide optimally rounded results. The algorithms
                 described here is guaranteed to produce optimally
                 rounded results and typically obtains the same
                 savings.",
  acknowledgement = ack-nhfb,
  affiliation =  "Res. Inst. for Symbolic Comput., Johannes Kepler
                 University, Linz, Austria",
  classification = "C5230 (Digital arithmetic methods)",
  confdate =     "29 June-2 July 1993",
  conflocation = "Windsor, Ont., Canada",
  confsponsor =  "IEEE Comput. Soc.; IEEE Tech. Committee on VLSI;
                 Natural Sci. and Eng. Res.; Council of Canada",
  keywords =     "ARITH-11; Floating-point numbers; Multiprecision
                 floating point multiplication; Optimal directional
                 rounding; Optimally rounded results",
  thesaurus =    "Floating point arithmetic",
}


bibtype: article
filename: fparith.bib
label: Krishna:1993:TFA
author: H. Krishna and J.-D. Sun
title: On theory and fast algorithms for error correction in residue number system product codes
journal: j-IEEE-TRANS-COMPUT
volume: 42
number: 7
pages: 840--853
month: jul
monthnumber: 7
year: 1993
CODEN: ITCOB4
DOI: https://doi.org/10.1109/12.237724
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Thu Jul 7 07:58:50 MDT 2011
bibtimestamp: 2011.07.07 07:58:50 MDT
fjournal: IEEE Transactions on Computers
keywords: residue arithmetic; residue number system
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: H. Krishna and J.-D. Sun
rawtitle: On theory and fast algorithms for error correction in residue number system product codes
URL:
http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=237724; http://ieeexplore.ieee.org/xpl/tocresult.jsp?isnumber=6095

entry:
@Article{Krishna:1993:TFA,
  author =       "H. Krishna and J.-D. Sun",
  title =        "On theory and fast algorithms for error correction in
                 residue number system product codes",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "42",
  number =       "7",
  pages =        "840--853",
  month =        jul,
  year =         "1993",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/12.237724",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Thu Jul 7 07:58:50 MDT 2011",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput1990.bib",
  URL =          "http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=237724;
                 http://ieeexplore.ieee.org/xpl/tocresult.jsp?isnumber=6095",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
  keywords =     "residue arithmetic; residue number system",
  summary =      "The authors develop a coding theory approach to error
                 control in residue number system product codes. Based
                 on this coding theory framework, computationally
                 efficient algorithms are derived for correcting single
                 errors, double errors, and multiple \ldots{}",
}


bibtype: article
filename: fparith.bib
label: Lee:1993:DAE
author: Joong-Eon Lee and Oh-Young Kwon and Tack-Don Han
title: Design of an area efficient unit for floating-point division and square root
journal: j-J-KOREA-INFO-SCI-SOCIETY
volume: 20
number: 7
pages: 1060--1071
month: jul
monthnumber: 7
year: 1993
CODEN: HJKHDC
ISSN: 0258-9125 OR 02589125
bibdate: Tue Dec 12 09:27:13 MST 1995
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1995.12.12 09:27:13 MST
fjournal: Journal of the Korea Information Science Society = Chongbo Kwahakhoe nonmunji
language: Korean
acknowledgement: ack-nhfb
thesaurus: Adders; Digital arithmetic; Parallel algorithms
rawauthor: Joong-Eon Lee and Oh-Young Kwon and Tack-Don Han
rawtitle: Design of an area efficient unit for floating-point division and square root
abstract:
The authors propose an algorithm for a high performance floating point division and square root unit that uses a parallel multiplier. The basic algorithm used in the design is the continued-product normalization method. In this method, an arbitrary number is constantly multiplied to the divisor and dividend and dividend/divisor ends up with quotient/1 and the desired result attained. However this method requires computation of x*(2-x) and x*(3-x)/2 and this is quite an overhead. Therefore they propose a new algorithm to compute (2-x) and (3-x)/2 by using the modified Booth algorithm. When applied to the continued-product normalization method, this algorithm can maximize the inherent parallelism of the continued-product normalization method, and reduce computation time by effectively applying pipelining, and also achieve area efficient design by eliminating one register and one carry propagate adder needed for computing (2-x) and (3-x)/2. When the designed unit is used with the seed generator which has the accuracy of 2/sup -7/, division can be executed in eight cycles and the square root operation in 13 cycles.

keywords:
Area efficient unit; Continued-product normalization method; Floating-point division; Modified Booth algorithm; Parallel multiplier; Pipelining; Seed generator; Square root

rawabstract:
The authors propose an algorithm for a high performance floating point division and square root unit that uses a parallel multiplier. The basic algorithm used in the design is the continued-product normalization method. In this method, an arbitrary number is constantly multiplied to the divisor and dividend and dividend/divisor ends up with quotient/1 and the desired result attained. However this method requires computation of x*(2-x) and x*(3-x)/2 and this is quite an overhead. Therefore they propose a new algorithm to compute (2-x) and (3-x)/2 by using the modified Booth algorithm. When applied to the continued-product normalization method, this algorithm can maximize the inherent parallelism of the continued-product normalization method, and reduce computation time by effectively applying pipelining, and also achieve area efficient design by eliminating one register and one carry propagate adder needed for computing (2-x) and (3-x)/2. When the designed unit is used with the seed generator which has the accuracy of 2/sup -7/, division can be executed in eight cycles and the square root operation in 13 cycles.

entry:
@Article{Lee:1993:DAE,
  author =       "Joong-Eon Lee and Oh-Young Kwon and Tack-Don Han",
  title =        "Design of an area efficient unit for floating-point
                 division and square root",
  journal =      j-J-KOREA-INFO-SCI-SOCIETY,
  volume =       "20",
  number =       "7",
  pages =        "1060--1071",
  month =        jul,
  year =         "1993",
  CODEN =        "HJKHDC",
  ISSN =         "0258-9125",
  bibdate =      "Tue Dec 12 09:27:13 MST 1995",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "The authors propose an algorithm for a high
                 performance floating point division and square root
                 unit that uses a parallel multiplier. The basic
                 algorithm used in the design is the continued-product
                 normalization method. In this method, an arbitrary
                 number is constantly multiplied to the divisor and
                 dividend and dividend/divisor ends up with quotient/1
                 and the desired result attained. However this method
                 requires computation of x*(2-x) and x*(3-x)/2 and this
                 is quite an overhead. Therefore they propose a new
                 algorithm to compute (2-x) and (3-x)/2 by using the
                 modified Booth algorithm. When applied to the
                 continued-product normalization method, this algorithm
                 can maximize the inherent parallelism of the
                 continued-product normalization method, and reduce
                 computation time by effectively applying pipelining,
                 and also achieve area efficient design by eliminating
                 one register and one carry propagate adder needed for
                 computing (2-x) and (3-x)/2. When the designed unit is
                 used with the seed generator which has the accuracy of
                 2/sup -7/, division can be executed in eight cycles and
                 the square root operation in 13 cycles.",
  acknowledgement = ack-nhfb,
  classification = "B1265B (Logic circuits); C4240P (Parallel
                 programming and algorithm theory); C5120 (Logic and
                 switching circuits); C5230 (Digital arithmetic
                 methods)",
  fjournal =     "Journal of the Korea Information Science Society =
                 Chongbo Kwahakhoe nonmunji",
  keywords =     "Area efficient unit; Continued-product normalization
                 method; Floating-point division; Modified Booth
                 algorithm; Parallel multiplier; Pipelining; Seed
                 generator; Square root",
  language =     "Korean",
  pubcountry =   "South Korea",
  thesaurus =    "Adders; Digital arithmetic; Parallel algorithms",
}


bibtype: inproceedings
filename: fparith.bib
label: Lewis:1993:ALA
author: D. M. Lewis
title: An accurate LNS arithmetic unit using interleaved memory function interpolator
crossref: Swartzlander:1993:SCA
pages: 2--9
year: 1993
bibdate: Sat Jul 16 16:14:38 MDT 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.07.16 16:14:38 MDT
URL: http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Lewis.pdf
keywords: ARITH-11
acknowledgement: ack-nhfb
rawauthor: D. M. Lewis
rawtitle: An accurate {LNS} arithmetic unit using interleaved memory function interpolator
entry:
@InProceedings{Lewis:1993:ALA,
  author =       "D. M. Lewis",
  title =        "An accurate {LNS} arithmetic unit using interleaved
                 memory function interpolator",
  crossref =     "Swartzlander:1993:SCA",
  pages =        "2--9",
  year =         "1993",
  bibdate =      "Sat Jul 16 16:14:38 MDT 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Lewis.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-11",
  summary =      "A logarithmic number system (LNS) arithmetic unit
                 using a new method for polynomial interpolation in
                 hardware is described. The use of an interleaved memory
                 reduces storage requirements by allowing each stored
                 function value to be used in \ldots{}",
}


bibtype: misc
filename: fparith.bib
label: Lindsley:1993:DME
author: Brett L. Lindsley
title: Device and method for evaluating exponentials
pages: 2--9
day: 5
month: jan
monthnumber: 1
year: 1993
bibdate: Tue Jan 08 22:31:05 2008
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2008.01.08 22:31:05 ???
URL: http://www.freepatentsonline.com/5177702.html
acknowledgement: ack-nhfb
howpublished: United States Patent 5,177,702
rawauthor: Brett L. Lindsley
rawtitle: Device and method for evaluating exponentials
abstract:
A method and apparatus are described for processing an input value to provide an output exponential value of a desired base raised to the power of the input value. The method includes, and the apparatus included hardware for implementing, the steps of adjusting the input value relative to the input value, a predetermined base of a first exponential value, and the desired base of the output exponential value to obtain a first scaled value, modifying the scaled value to obtain an approximation value, determining the first exponential value of the approximation value, generating an adjusted error value relative to the first scaled value, the approximation value, and a logarithm of the predetermined base of the first exponential value, determining a correction value for the first exponential value and combining the first exponential value with the correction value to obtain, substantially, the output exponential value having the desired base raised to the power of the input value.

rawabstract:
A method and apparatus are described for processing an input value to provide an output exponential value of a desired base raised to the power of the input value. The method includes, and the apparatus included hardware for implementing, the steps of adjusting the input value relative to the input value, a predetermined base of a first exponential value, and the desired base of the output exponential value to obtain a first scaled value, modifying the scaled value to obtain an approximation value, determining the first exponential value of the approximation value, generating an adjusted error value relative to the first scaled value, the approximation value, and a logarithm of the predetermined base of the first exponential value, determining a correction value for the first exponential value and combining the first exponential value with the correction value to obtain, substantially, the output exponential value having the desired base raised to the power of the input value.

entry:
@Misc{Lindsley:1993:DME,
  author =       "Brett L. Lindsley",
  title =        "Device and method for evaluating exponentials",
  howpublished = "United States Patent 5,177,702",
  day =          "5",
  month =        jan,
  year =         "1993",
  bibdate =      "Tue Jan 08 22:31:05 2008",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.freepatentsonline.com/5177702.html",
  abstract =     "A method and apparatus are described for processing an
                 input value to provide an output exponential value of a
                 desired base raised to the power of the input value.
                 The method includes, and the apparatus included
                 hardware for implementing, the steps of adjusting the
                 input value relative to the input value, a
                 predetermined base of a first exponential value, and
                 the desired base of the output exponential value to
                 obtain a first scaled value, modifying the scaled value
                 to obtain an approximation value, determining the first
                 exponential value of the approximation value,
                 generating an adjusted error value relative to the
                 first scaled value, the approximation value, and a
                 logarithm of the predetermined base of the first
                 exponential value, determining a correction value for
                 the first exponential value and combining the first
                 exponential value with the correction value to obtain,
                 substantially, the output exponential value having the
                 desired base raised to the power of the input value.",
  acknowledgement = ack-nhfb,
}


bibtype: article
filename: fparith.bib
label: Linzer:1993:IEF
author: E. N. Linzer and E. Feig
title: Implementation of Efficient FFT Algorithms on Fused Multiply-Add Architectures
journal: j-IEEE-TRANS-SIG-PROC
volume: 41
number: 1
pages: 2--9
year: 1993
CODEN: ITPRED
DOI: https://doi.org/10.1109/TSP.1993.193130
ISSN: 1053-587X (print), 1941-0476 (electronic) OR 1053587X (print), 19410476 (electronic)
ISSNL: 1053-587X OR 1053587X
bibdate: Sun Feb 20 10:11:17 2011
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2011.02.20 10:11:17 ???
fjournal: IEEE Transactions on Signal Processing
acknowledgement: ack-nhfb
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=78
rawauthor: E. N. Linzer and E. Feig
rawtitle: Implementation of Efficient {FFT} Algorithms on Fused Multiply-Add Architectures
entry:
@Article{Linzer:1993:IEF,
  author =       "E. N. Linzer and E. Feig",
  title =        "Implementation of Efficient {FFT} Algorithms on Fused
                 Multiply-Add Architectures",
  journal =      j-IEEE-TRANS-SIG-PROC,
  volume =       "41",
  number =       "1",
  year =         "1993",
  CODEN =        "ITPRED",
  DOI =          "https://doi.org/10.1109/TSP.1993.193130",
  ISSN =         "1053-587X (print), 1941-0476 (electronic)",
  ISSN-L =       "1053-587X",
  bibdate =      "Sun Feb 20 10:11:17 2011",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "IEEE Transactions on Signal Processing",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=78",
}


bibtype: article
filename: fparith.bib
label: Lo:1993:BCP
author: J.-C. Lo and S. Thanawastien and T. R. N. Rao
title: Berger check prediction for array multipliers and array dividers
journal: j-IEEE-TRANS-COMPUT
volume: 42
number: 7
pages: 892--896
month: jul
monthnumber: 7
year: 1993
CODEN: ITCOB4
DOI: https://doi.org/10.1109/12.237731
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Thu Jul 7 07:58:50 MDT 2011
bibtimestamp: 2011.07.07 07:58:50 MDT
note: See correction cite Lo:1996:CBC.
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=237731
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: J.-C. Lo and S. Thanawastien and T. R. N. Rao
rawnote: See correction \cite{Lo:1996:CBC}.
rawtitle: {Berger} check prediction for array multipliers and array dividers
entry:
@Article{Lo:1993:BCP,
  author =       "J.-C. Lo and S. Thanawastien and T. R. N. Rao",
  title =        "{Berger} check prediction for array multipliers and
                 array dividers",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "42",
  number =       "7",
  pages =        "892--896",
  month =        jul,
  year =         "1993",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/12.237731",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Thu Jul 7 07:58:50 MDT 2011",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput1990.bib",
  note =         "See correction \cite{Lo:1996:CBC}.",
  URL =          "http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=237731",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
}


bibtype: inproceedings
filename: fparith.bib
label: Louie:1993:DRD
author: M. E. Louie and M. D. Ercegovac
title: On Digit-Recurrence Division Implementations for Field Programmable Gate Arrays
crossref: Swartzlander:1993:SCA
pages: 202--209
year: 1993
bibdate: Sat Nov 17 09:46:07 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.17 09:46:07 ???
URL: http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Louie.pdf
keywords: ARITH-11
acknowledgement: ack-nhfb
rawauthor: M. E. Louie and M. D. Ercegovac
rawtitle: On Digit-Recurrence Division Implementations for Field Programmable Gate Arrays
entry:
@InProceedings{Louie:1993:DRD,
  author =       "M. E. Louie and M. D. Ercegovac",
  title =        "On Digit-Recurrence Division Implementations for Field
                 Programmable Gate Arrays",
  crossref =     "Swartzlander:1993:SCA",
  pages =        "202--209",
  year =         "1993",
  bibdate =      "Sat Nov 17 09:46:07 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Louie.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-11",
}


bibtype: inproceedings
filename: fparith.bib
label: Louie:1993:DRS
author: M. E. Louie and M. D. Ercegovac
booktitle: Proceedings of the IEEE Workshop on FPGAs for Custom Computing Machines, 5--7 April 1993
title: A digit-recurrence square root implementation for field programmable gate arrays
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 178--183
year: 1993
bibdate: Sat Jul 16 15:28:14 MDT 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.07.16 15:28:14 MDT
acknowledgement: ack-nhfb
rawauthor: M. E. Louie and M. D. Ercegovac
rawbooktitle: Proceedings of the {IEEE} Workshop on {FPGAs} for Custom Computing Machines, 5--7 April 1993
rawtitle: A digit-recurrence square root implementation for field programmable gate arrays
entry:
@InProceedings{Louie:1993:DRS,
  author =       "M. E. Louie and M. D. Ercegovac",
  booktitle =    "Proceedings of the {IEEE} Workshop on {FPGAs} for
                 Custom Computing Machines, 5--7 April 1993",
  title =        "A digit-recurrence square root implementation for
                 field programmable gate arrays",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "178--183",
  year =         "1993",
  CODEN =        "????",
  ISSN =         "????",
  bibdate =      "Sat Jul 16 15:28:14 MDT 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  summary =      "Creating efficient arithmetic processors requires a
                 pairing of high speed arithmetic algorithms with
                 optimal mapping strategies for a given technology. The
                 authors propose bit reduction as key to an efficient
                 pairing process for lookup table based \ldots{}",
}


bibtype: inproceedings
filename: fparith.bib
label: Lozier:1993:UGF
author: D. W. Lozier
title: An underflow-induced graphics failure solved by SLI arithmetic
crossref: Swartzlander:1993:SCA
pages: 10--17
year: 1993
bibdate: Thu Dec 14 11:25:18 MST 1995
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1995.12.14 11:25:18 MST
URL: http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Lozier.pdf
acknowledgement: ack-nhfb
affiliation: Nat. Inst. of Stand. and Technol., Gaithersburg, MD, USA
thesaurus: Computer graphics; Floating point arithmetic
rawauthor: D. W. Lozier
rawtitle: An underflow-induced graphics failure solved by {SLI} arithmetic
abstract:
Floating-point underflow is often regarded as either harmless or as an indication that the computational algorithm is in need of scaling. A counterexample to this view is given of a function for which contour plotting is difficult due to floating-point underflow. The function arose as an asymptotic solution to a model problem in turbulent combustion in which two chemical species (fuel and oxidizer) mix and react in a vortex field. Scaling is not a viable option because of extreme sensitivity to a small physical parameter. Standard graphics software packages produce erroneous contours without any indication of difficulty. This example provides support for considering symmetric level-index arithmetic, a new form of computer arithmetic which is immune to underflow and overflow.

keywords:
ARITH-11; Asymptotic solution; Computer arithmetic; Contour plotting; Floating point underflow; Graphics failure; Graphics software packages; Turbulent combustion

rawabstract:
Floating-point underflow is often regarded as either harmless or as an indication that the computational algorithm is in need of scaling. A counterexample to this view is given of a function for which contour plotting is difficult due to floating-point underflow. The function arose as an asymptotic solution to a model problem in turbulent combustion in which two chemical species (fuel and oxidizer) mix and react in a vortex field. Scaling is not a viable option because of extreme sensitivity to a small physical parameter. Standard graphics software packages produce erroneous contours without any indication of difficulty. This example provides support for considering symmetric level-index arithmetic, a new form of computer arithmetic which is immune to underflow and overflow.

entry:
@InProceedings{Lozier:1993:UGF,
  author =       "D. W. Lozier",
  title =        "An underflow-induced graphics failure solved by {SLI}
                 arithmetic",
  crossref =     "Swartzlander:1993:SCA",
  pages =        "10--17",
  year =         "1993",
  bibdate =      "Thu Dec 14 11:25:18 MST 1995",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Lozier.pdf",
  abstract =     "Floating-point underflow is often regarded as either
                 harmless or as an indication that the computational
                 algorithm is in need of scaling. A counterexample to
                 this view is given of a function for which contour
                 plotting is difficult due to floating-point underflow.
                 The function arose as an asymptotic solution to a model
                 problem in turbulent combustion in which two chemical
                 species (fuel and oxidizer) mix and react in a vortex
                 field. Scaling is not a viable option because of
                 extreme sensitivity to a small physical parameter.
                 Standard graphics software packages produce erroneous
                 contours without any indication of difficulty. This
                 example provides support for considering symmetric
                 level-index arithmetic, a new form of computer
                 arithmetic which is immune to underflow and overflow.",
  acknowledgement = ack-nhfb,
  affiliation =  "Nat. Inst. of Stand. and Technol., Gaithersburg, MD,
                 USA",
  classification = "C5230 (Digital arithmetic methods); C6130B (Graphics
                 techniques)",
  confdate =     "29 June-2 July 1993",
  conflocation = "Windsor, Ont., Canada",
  confsponsor =  "IEEE Comput. Soc.; IEEE Tech. Committee on VLSI;
                 Natural Sci. and Eng. Res.; Council of Canada",
  keywords =     "ARITH-11; Asymptotic solution; Computer arithmetic;
                 Contour plotting; Floating point underflow; Graphics
                 failure; Graphics software packages; Turbulent
                 combustion",
  thesaurus =    "Computer graphics; Floating point arithmetic",
}


bibtype: article
filename: fparith.bib
label: Mandelbaum:1993:SRS
author: D. M. Mandelbaum
title: Some results on a SRT type division scheme
journal: j-IEEE-TRANS-COMPUT
volume: 42
number: 1
pages: 102--106
month: jan
monthnumber: 1
year: 1993
CODEN: ITCOB4
DOI: https://doi.org/10.1109/12.192218
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Thu Jul 7 07:58:46 MDT 2011
bibtimestamp: 2011.07.07 07:58:46 MDT
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=192218
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: D. M. Mandelbaum
rawtitle: Some results on a {SRT} type division scheme
entry:
@Article{Mandelbaum:1993:SRS,
  author =       "D. M. Mandelbaum",
  title =        "Some results on a {SRT} type division scheme",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "42",
  number =       "1",
  pages =        "102--106",
  month =        jan,
  year =         "1993",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/12.192218",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Thu Jul 7 07:58:46 MDT 2011",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput1990.bib",
  URL =          "http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=192218",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
}


bibtype: mastersthesis
filename: fparith.bib
label: Maryoung:1993:DBP
author: James Maryoung
title: Development of a binary phase shift keying modem receiver with a floating point processor TMS320C30
type: Thesis (M.S.)
school: California State University, Long Beach
address: Long Beach, CA, USA
pages: xi + 265
year: 1993
bibdate: Sat Feb 24 15:01:45 MST 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.02.24 15:01:45 MST
keywords: Signal processing --- Algorithms.; Signal processing --- Digital techniques.
acknowledgement: ack-nhfb
rawauthor: James Maryoung
rawtitle:
Development of a binary phase shift keying modem receiver with a floating point processor {TMS320C30}

entry:
@MastersThesis{Maryoung:1993:DBP,
  author =       "James Maryoung",
  title =        "Development of a binary phase shift keying modem
                 receiver with a floating point processor {TMS320C30}",
  type =         "Thesis ({M.S.})",
  school =       "California State University, Long Beach",
  address =      "Long Beach, CA, USA",
  pages =        "xi + 265",
  year =         "1993",
  bibdate =      "Sat Feb 24 15:01:45 MST 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "Signal processing --- Algorithms.; Signal processing
                 --- Digital techniques.",
}


bibtype: article
filename: fparith.bib
label: Masotti:1993:FNE
author: G. Masotti
title: Floating-point numbers with error estimates
journal: j-CAD
volume: 25
number: 9
pages: 524--538
month: sep
monthnumber: 9
year: 1993
CODEN: CAIDA5
ISSN: 0010-4485 (print), 1879-2685 (electronic) OR 00104485 (print), 18792685 (electronic)
bibdate: Sat Feb 24 15:01:45 MST 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.02.24 15:01:45 MST
acknowledgement: ack-nhfb
affiliation: Dept. di Elettr. Inf. e Sistem., Universita degli Studi di Bologna, Bologna, Italy
thesaurus: Digital arithmetic; Error statistics; Roundoff errors
rawauthor: G. Masotti
rawtitle: Floating-point numbers with error estimates
abstract:
Addresses the problem of precision in floating-point computations. A method for estimating the errors which affect intermediate and final results is presented, and a synthesis of many software simulations is discussed. The basic idea is to represent floating-point numbers by means of a data-structure collecting value and estimated error information. It has been found that, under certain circumstances, the estimate of the absolute error is accurate and has a compact statistical distribution. It is also shown that, by monitoring the estimated relative error during a computation (an ad hoc definition of relative error is used), the validity of results can be ensured. The error estimates enable robust algorithms to be implemented and ill-conditioned problems to be detected. A hardware implementation of the method by means of a special floating-point processor is outlined. A dynamic extension of number precision, under the control of error estimates, is also advocated, in order to compute results within given error bounds.

keywords:
Compact statistical distribution; Computer arithmetic; Data-structure collecting value; Dynamic extension; Dynamic precision extension; Error bounds; Error estimates; Final results; Floating-point numbers; Floating-point processor; Hardware implementation; Ill-conditioned problems; Intermediate results; Numerical accuracy; Relative error; Robust algorithms; Software simulations; Validity

rawabstract:
Addresses the problem of precision in floating-point computations. A method for estimating the errors which affect intermediate and final results is presented, and a synthesis of many software simulations is discussed. The basic idea is to represent floating-point numbers by means of a data-structure collecting value and estimated error information. It has been found that, under certain circumstances, the estimate of the absolute error is accurate and has a compact statistical distribution. It is also shown that, by monitoring the estimated relative error during a computation (an ad hoc definition of relative error is used), the validity of results can be ensured. The error estimates enable robust algorithms to be implemented and ill-conditioned problems to be detected. A hardware implementation of the method by means of a special floating-point processor is outlined. A dynamic extension of number precision, under the control of error estimates, is also advocated, in order to compute results within given error bounds.

entry:
@Article{Masotti:1993:FNE,
  author =       "G. Masotti",
  title =        "Floating-point numbers with error estimates",
  journal =      j-CAD,
  volume =       "25",
  number =       "9",
  pages =        "524--538",
  month =        sep,
  year =         "1993",
  CODEN =        "CAIDA5",
  ISSN =         "0010-4485 (print), 1879-2685 (electronic)",
  bibdate =      "Sat Feb 24 15:01:45 MST 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "Addresses the problem of precision in floating-point
                 computations. A method for estimating the errors which
                 affect intermediate and final results is presented, and
                 a synthesis of many software simulations is discussed.
                 The basic idea is to represent floating-point numbers
                 by means of a data-structure collecting value and
                 estimated error information. It has been found that,
                 under certain circumstances, the estimate of the
                 absolute error is accurate and has a compact
                 statistical distribution. It is also shown that, by
                 monitoring the estimated relative error during a
                 computation (an ad hoc definition of relative error is
                 used), the validity of results can be ensured. The
                 error estimates enable robust algorithms to be
                 implemented and ill-conditioned problems to be
                 detected. A hardware implementation of the method by
                 means of a special floating-point processor is
                 outlined. A dynamic extension of number precision,
                 under the control of error estimates, is also
                 advocated, in order to compute results within given
                 error bounds.",
  acknowledgement = ack-nhfb,
  affiliation =  "Dept. di Elettr. Inf. e Sistem., Universita degli
                 Studi di Bologna, Bologna, Italy",
  classification = "C5230 (Digital arithmetic methods)",
  keywords =     "Compact statistical distribution; Computer arithmetic;
                 Data-structure collecting value; Dynamic extension;
                 Dynamic precision extension; Error bounds; Error
                 estimates; Final results; Floating-point numbers;
                 Floating-point processor; Hardware implementation;
                 Ill-conditioned problems; Intermediate results;
                 Numerical accuracy; Relative error; Robust algorithms;
                 Software simulations; Validity",
  pubcountry =   "UK",
  thesaurus =    "Digital arithmetic; Error statistics; Roundoff
                 errors",
}


bibtype: article
filename: fparith.bib
label: Mazenc:1993:CFU
author: Christophe Mazenc and Xavier Merrheim and Jean-Michel Muller
title: Computing functions $ cos ^-1 $ and $ sin ^-1 $ using Cordic
journal: j-IEEE-TRANS-COMPUT
volume: 42
number: 1
pages: 118--122
month: jan
monthnumber: 1
year: 1993
CODEN: ITCOB4
DOI: https://doi.org/10.1109/12.192222
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Thu Jul 7 07:58:47 MDT 2011
bibtimestamp: 2011.07.07 07:58:47 MDT
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=192222
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: Christophe Mazenc and Xavier Merrheim and Jean-Michel Muller
rawtitle: Computing functions $ \cos^{-1} $ and $ \sin^{-1} $ using {Cordic}
entry:
@Article{Mazenc:1993:CFU,
  author =       "Christophe Mazenc and Xavier Merrheim and Jean-Michel
                 Muller",
  title =        "Computing functions $ \cos^{-1} $ and $ \sin^{-1} $
                 using {Cordic}",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "42",
  number =       "1",
  pages =        "118--122",
  month =        jan,
  year =         "1993",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/12.192222",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Thu Jul 7 07:58:47 MDT 2011",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput1990.bib",
  URL =          "http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=192222",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
}


bibtype: techreport
filename: fparith.bib
label: McClellan:1993:AFP
author: Scott McClellan
title: Alternatives to floating point representation
type: Honors paper
number: 4
institution: United States Naval Academy Honors Paper. Dept. of Mathematics
pages: various
year: 1993
bibdate: Sat May 04 17:18:52 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.05.04 17:18:52 ???
keywords: Floating-point arithmetic.
remark: Honors paper--United States Naval Academy, 1993.
acknowledgement: ack-nhfb
rawauthor: Scott McClellan
rawtitle: Alternatives to floating point representation
entry:
@TechReport{McClellan:1993:AFP,
  author =       "Scott McClellan",
  title =        "Alternatives to floating point representation",
  type =         "Honors paper",
  number =       "4",
  institution =  "United States Naval Academy Honors Paper. Dept. of
                 Mathematics",
  pages =        "various",
  year =         "1993",
  bibdate =      "Sat May 04 17:18:52 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "Floating-point arithmetic.",
  remark =       "Honors paper--United States Naval Academy, 1993.",
}


bibtype: article
filename: fparith.bib
label: McKeeman:1993:AOC
author: W. M. McKeeman
title: Avoiding Overflow in Constant Expression Evaluation
journal: j-JCLT
volume: 5
number: 1
pages: 27--31
month: sep
monthnumber: 9
year: 1993
ISSN: 1042-5721 OR 10425721
bibdate: Fri Nov 21 14:40:20 1997
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1997.11.21 14:40:20 ???
fjournal: The Journal of C Language Translation
remark: Predicting overflow before it occurs
acknowledgement: ack-nhfb
rawauthor: W. M. McKeeman
rawtitle: Avoiding Overflow in Constant Expression Evaluation
entry:
@Article{McKeeman:1993:AOC,
  author =       "W. M. McKeeman",
  title =        "Avoiding Overflow in Constant Expression Evaluation",
  journal =      j-JCLT,
  volume =       "5",
  number =       "1",
  pages =        "27--31",
  month =        sep,
  year =         "1993",
  ISSN =         "1042-5721",
  bibdate =      "Fri Nov 21 14:40:20 1997",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "The Journal of {C} Language Translation",
  remark =       "Predicting overflow before it occurs",
}


bibtype: inproceedings
filename: fparith.bib
label: McQuillan:1993:NAV
author: S. E. McQuillan and J. V. McCanny and R. Hamill
title: New algorithms and VLSI architectures for SRT division and square root
crossref: Swartzlander:1993:SCA
pages: 80--86
year: 1993
bibdate: Sat Jul 16 15:28:14 MDT 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.07.16 15:28:14 MDT
URL: http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_McQuillan.pdf
keywords: ARITH-11
acknowledgement: ack-sfo
rawauthor: S. E. McQuillan and J. V. McCanny and R. Hamill
rawtitle: New algorithms and {VLSI} architectures for {SRT} division and square root
entry:
@InProceedings{McQuillan:1993:NAV,
  author =       "S. E. McQuillan and J. V. McCanny and R. Hamill",
  title =        "New algorithms and {VLSI} architectures for {SRT}
                 division and square root",
  crossref =     "Swartzlander:1993:SCA",
  pages =        "80--86",
  year =         "1993",
  bibdate =      "Sat Jul 16 15:28:14 MDT 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_McQuillan.pdf",
  acknowledgement = ack-sfo # " and " # ack-nhfb,
  keywords =     "ARITH-11",
  summary =      "Radix two algorithms for SRT division and
                 square-rooting are developed. For these schemes, the
                 result digits and the residuals are computed
                 concurrently and the computations in adjacent rows are
                 overlapped. Consequently, their performance should
                 \ldots{}",
}


bibtype: article
filename: fparith.bib
label: Meier:1993:EMC
author: Willi Meier and Othmar Staffelbach
title: Efficient Multiplication on Certain Nonsupersingular Elliptic Curves
journal: j-LECT-NOTES-COMP-SCI
volume: 740
pages: 333--344
year: 1993
CODEN: LNCSD9
ISSN: 0302-9743 (print), 1611-3349 (electronic) OR 03029743 (print), 16113349 (electronic)
ISSNL: 0302-9743 OR 03029743
bibdate: Tue Feb 5 11:48:51 MST 2002
bibtimestamp: 2002.02.05 11:48:51 MST
fjournal: Lecture Notes in Computer Science
keywords: CRYPTO; cryptology
acknowledgement: ack-nhfb
journalURL: http://link.springer.com/bookseries/558
rawauthor: Willi Meier and Othmar Staffelbach
rawtitle: Efficient Multiplication on Certain Nonsupersingular Elliptic Curves
bibsource:
http://link.springer-ny.com/link/service/series/0558/tocs/t0740.htm; https://www.math.utah.edu/pub/tex/bib/fparith.bib

URL:
http://link.springer-ny.com/link/service/series/0558/bibs/0740/07400333.htm; http://link.springer-ny.com/link/service/series/0558/papers/0740/07400333.pdf

entry:
@Article{Meier:1993:EMC,
  author =       "Willi Meier and Othmar Staffelbach",
  title =        "Efficient Multiplication on Certain Nonsupersingular
                 Elliptic Curves",
  journal =      j-LECT-NOTES-COMP-SCI,
  volume =       "740",
  pages =        "333--344",
  year =         "1993",
  CODEN =        "LNCSD9",
  ISSN =         "0302-9743 (print), 1611-3349 (electronic)",
  ISSN-L =       "0302-9743",
  bibdate =      "Tue Feb 5 11:48:51 MST 2002",
  bibsource =    "http://link.springer-ny.com/link/service/series/0558/tocs/t0740.htm;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://link.springer-ny.com/link/service/series/0558/bibs/0740/07400333.htm;
                 http://link.springer-ny.com/link/service/series/0558/papers/0740/07400333.pdf",
  acknowledgement = ack-nhfb,
  fjournal =     "Lecture Notes in Computer Science",
  journal-URL =  "http://link.springer.com/bookseries/558",
  keywords =     "CRYPTO; cryptology",
}


bibtype: inproceedings
filename: fparith.bib
label: Mellott:1993:GMG
author: Jonathon D. Mellott and Jeremy C. Smith and Fred J. Taylor
title: The Gauss Machine: a Galois-Enhanced Quadratic Residue Number System Systolic Array
crossref: Swartzlander:1993:SCA
pages: 156--162
year: 1993
DOI: https://doi.org/10.1109/ARITH.1993.378097
bibdate: Sat Nov 17 09:46:07 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.17 09:46:07 ???
URL: http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Mellott.pdf
keywords: ARITH-11; residue arithmetic; residue number system
acknowledgement: ack-nhfb
rawauthor: Jonathon D. Mellott and Jeremy C. Smith and Fred J. Taylor
rawtitle: The {Gauss} Machine: a {Galois}-Enhanced Quadratic Residue Number System Systolic Array
entry:
@InProceedings{Mellott:1993:GMG,
  author =       "Jonathon D. Mellott and Jeremy C. Smith and Fred J.
                 Taylor",
  title =        "The {Gauss} Machine: a {Galois}-Enhanced Quadratic
                 Residue Number System Systolic Array",
  crossref =     "Swartzlander:1993:SCA",
  pages =        "156--162",
  year =         "1993",
  DOI =          "https://doi.org/10.1109/ARITH.1993.378097",
  bibdate =      "Sat Nov 17 09:46:07 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Mellott.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-11; residue arithmetic; residue number system",
  summary =      "The Gauss machine is a SIMD systolic array
                 architecture that takes advantage of the
                 Galois-enhanced residue number system (GEQRNS) to form
                 reduced-complexity arithmetic elements. The Gauss
                 machine is targeted at front-end signal and image
                 processing applications. A discrete prototype that
                 achieves a peak rating of 320 million complex
                 arithmetic operations per second while operating at 10
                 MHz has been constructed. A VLSI implementation of the
                 Gauss machine's processor cell has been created. The
                 VLSI implementation is implemented in 2.0-$\mu$m CMOS
                 and achieves greater than 20-MHz performance, using
                 less than 2.0-mm$^2$ die area. It is shown that
                 techniques for defect tolerance in RNS systolic arrays
                 can result in substantial yield enhancement, thereby
                 making larger than conventional (ULSI) systems
                 possible",
}


bibtype: inproceedings
filename: fparith.bib
label: Merrheim:1993:FEP
author: Xavier Merrheim and Jean-Michel Muller and Hong-Jin Yeh
title: Fast Evaluation of Polynomials and Inverses of Polynomials
crossref: Swartzlander:1993:SCA
pages: 186--192
year: 1993
bibdate: Sat Nov 17 09:46:07 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.17 09:46:07 ???
URL: http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Merrheim.pdf
keywords: ARITH-11
acknowledgement: ack-nhfb
rawauthor: Xavier Merrheim and Jean-Michel Muller and Hong-Jin Yeh
rawtitle: Fast Evaluation of Polynomials and Inverses of Polynomials
entry:
@InProceedings{Merrheim:1993:FEP,
  author =       "Xavier Merrheim and Jean-Michel Muller and Hong-Jin
                 Yeh",
  title =        "Fast Evaluation of Polynomials and Inverses of
                 Polynomials",
  crossref =     "Swartzlander:1993:SCA",
  pages =        "186--192",
  year =         "1993",
  bibdate =      "Sat Nov 17 09:46:07 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Merrheim.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-11",
}


bibtype: mastersthesis
filename: fparith.bib
label: Mesfin:1993:IHP
author: Biniam Mesfin
title: Implementation of a high performance floating point unit multiplier
type: Thesis (M.A.Sc.)
school: University of Windsor
address: Windsor, ON, Canada
pages: 186--192
year: 1993
ISBN: 0-315-78864-X OR 031578864X
ISBN13: 978-0-315-78864-0 OR 9780315788640
bibdate: Sat Feb 24 15:01:45 MST 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.02.24 15:01:45 MST
series: National Library of Canada = Bibliotheque nationale du Canada; Canadian theses = Theses canadiennes
remark: 3 microfiches. University Microfilms order no. UMI00399117
acknowledgement: ack-nhfb
rawauthor: Biniam Mesfin
rawtitle: Implementation of a high performance floating point unit multiplier
entry:
@MastersThesis{Mesfin:1993:IHP,
  author =       "Biniam Mesfin",
  title =        "Implementation of a high performance floating point
                 unit multiplier",
  type =         "Thesis ({M.A.Sc.})",
  school =       "University of Windsor",
  address =      "Windsor, ON, Canada",
  year =         "1993",
  ISBN =         "0-315-78864-X",
  ISBN-13 =      "978-0-315-78864-0",
  LCCN =         "????",
  bibdate =      "Sat Feb 24 15:01:45 MST 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  series =       "National Library of Canada = Bibliotheque nationale du
                 Canada; Canadian theses = Theses canadiennes",
  acknowledgement = ack-nhfb,
  remark =       "3 microfiches. University Microfilms order no.
                 UMI00399117",
}


bibtype: article
filename: fparith.bib
label: Metzger:1993:IFR
author: D. Metzger
journal: j-IEEE-TRANS-SIG-PROC
volume: 41
number: 1
pages: 449
month: jan
monthnumber: 1
year: 1993
CODEN: ITPRED
ISSN: 1053-587X (print), 1941-0476 (electronic) OR 1053587X (print), 19410476 (electronic)
ISSNL: 1053-587X OR 1053587X
bibdate: Sat Jul 16 08:40:52 MDT 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.07.16 08:40:52 MDT
fjournal: IEEE Transactions on Signal Processing
acknowledgement: ack-nhfb
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=78
rawauthor: D. Metzger
title:
Investigation of Finite Register Length Effects on Winograd FFT Computation Using Floating Point Math

rawtitle:
Investigation of Finite Register Length Effects on {Winograd} {FFT} Computation Using Floating Point Math

entry:
@Article{Metzger:1993:IFR,
  author =       "D. Metzger",
  title =        "Investigation of Finite Register Length Effects on
                 {Winograd} {FFT} Computation Using Floating Point
                 Math",
  journal =      j-IEEE-TRANS-SIG-PROC,
  volume =       "41",
  number =       "1",
  pages =        "449",
  month =        jan,
  year =         "1993",
  CODEN =        "ITPRED",
  ISSN =         "1053-587X (print), 1941-0476 (electronic)",
  ISSN-L =       "1053-587X",
  bibdate =      "Sat Jul 16 08:40:52 MDT 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "IEEE Transactions on Signal Processing",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=78",
}


bibtype: manual
filename: fparith.bib
label: MicrosoftCorporation:1993:PGM
author: Microsoft Corporation
title: Programmer's guides: Microsoft Visual C++ development system for Windows: version 1.0
organization: Microsoft Corp.
address: Redmond, WA, USA
pages: various
year: 1993
bibdate: Sat Feb 24 15:01:45 MST 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.02.24 15:01:45 MST
keywords: C++ (Computer program language); Microsoft Visual C++.
acknowledgement: ack-nhfb
rawauthor: {Microsoft Corporation}
rawtitle: Programmer's guides: {Microsoft Visual C++} development system for {Windows}: version 1.0
remark:
C++ tutorial: introduction to C++: a first look at C++; C++ enhancements to C; references; classes: introduction to classes; classes and dynamic memory allocation; more features of classes; inheritance and polymorphism; operator overloading and conversion functions; object-oriented design: fundamentals of object-oriented design; design example, a windowing class --- Class library user's guide for the Microsoft Foundation Class Library: introducing the class library; creating a new application with AppWizard; creating the document, view; constructing the user interface with App Studio; binding visual objects to code using ClassWizard; adding a dialog box; enhancing views, printing; adding context-sensitive help; general-prupose classes; CObject class; collections; files and serialization; diagnostics; exceptions; programming with VBX controls; OLE support --- Programming techniques: improving program performance: using precompiled headers; managing memory for 16-bit C programs; controlling floating-point math operations; special environments: programming for Windows; programming with mixed languages; writing portable C programs. [Section one of the book], the C++ tutorial, provides an introduction to the C++ language and object-oriented programming. [It] assumes [the reader is] familiar with C ldots [Section two] contains a tutorial for the Microsoft Foundation Class Library. The class library is a set of C++ classes that encapsulate the functionality of applications written for the Microsoft Windows operating system ldots [Section three], programming techniques, describes how to take advantage of the special features of Microsoft Visual C++. The topics covered ldots include language extensions, special-purpose library functions, and the interaction between programming strategies and compiler options. [This section] is divided into two parts. Part I, ``Improving Program Performance,'' helps [the reader] write more efficient programs ldots Part 2, ``Special Environments,'' covers techniques specific to certain programming situations. -Introds.

entry:
@Manual{MicrosoftCorporation:1993:PGM,
  author =       "{Microsoft Corporation}",
  title =        "Programmer's guides: {Microsoft Visual C++}
                 development system for {Windows}: version 1.0",
  organization = "Microsoft Corp.",
  address =      "Redmond, WA, USA",
  pages =        "various",
  year =         "1993",
  bibdate =      "Sat Feb 24 15:01:45 MST 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "C++ (Computer program language); Microsoft Visual
                 C++.",
  remark =       "C++ tutorial: introduction to C++: a first look at
                 C++; C++ enhancements to C; references; classes:
                 introduction to classes; classes and dynamic memory
                 allocation; more features of classes; inheritance and
                 polymorphism; operator overloading and conversion
                 functions; object-oriented design: fundamentals of
                 object-oriented design; design example, a windowing
                 class --- Class library user's guide for the Microsoft
                 Foundation Class Library: introducing the class
                 library; creating a new application with AppWizard;
                 creating the document, view; constructing the user
                 interface with App Studio; binding visual objects to
                 code using ClassWizard; adding a dialog box; enhancing
                 views, printing; adding context-sensitive help;
                 general-prupose classes; CObject class; collections;
                 files and serialization; diagnostics; exceptions;
                 programming with VBX controls; OLE support ---
                 Programming techniques: improving program performance:
                 using precompiled headers; managing memory for 16-bit C
                 programs; controlling floating-point math operations;
                 special environments: programming for Windows;
                 programming with mixed languages; writing portable C
                 programs. [Section one of the book], the C++ tutorial,
                 provides an introduction to the C++ language and
                 object-oriented programming. [It] assumes [the reader
                 is] familiar with C \ldots{} [Section two] contains a
                 tutorial for the Microsoft Foundation Class Library.
                 The class library is a set of C++ classes that
                 encapsulate the functionality of applications written
                 for the Microsoft Windows operating system \ldots{}
                 [Section three], programming techniques, describes how
                 to take advantage of the special features of Microsoft
                 Visual C++. The topics covered \ldots{} include
                 language extensions, special-purpose library functions,
                 and the interaction between programming strategies and
                 compiler options. [This section] is divided into two
                 parts. Part I, ``Improving Program Performance,'' helps
                 [the reader] write more efficient programs \ldots{}
                 Part 2, ``Special Environments,'' covers techniques
                 specific to certain programming situations. -Introds.",
}


bibtype: article
filename: fparith.bib
label: Mikami:1993:RER
author: N. Mikami and M. Kobayashi and Y. Yokoyama
journal: j-IEEE-TRANS-SIG-PROC
volume: 41
number: 5
pages: 1953--1955
month: may
monthnumber: 5
year: 1993
CODEN: ITPRED
ISSN: 1053-587X (print), 1941-0476 (electronic) OR 1053587X (print), 19410476 (electronic)
ISSNL: 1053-587X OR 1053587X
bibdate: Sat Jul 16 11:25:06 MDT 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.07.16 11:25:06 MDT
fjournal: IEEE Transactions on Signal Processing
acknowledgement: ack-nhfb
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=78
rawauthor: N. Mikami and M. Kobayashi and Y. Yokoyama
title:
Roundoff-error reduction for evaluation of a function by polynomial approximation with error feedback in fixed-point arithmetic

rawtitle:
Roundoff-error reduction for evaluation of a function by polynomial approximation with error feedback in fixed-point arithmetic

entry:
@Article{Mikami:1993:RER,
  author =       "N. Mikami and M. Kobayashi and Y. Yokoyama",
  title =        "Roundoff-error reduction for evaluation of a function
                 by polynomial approximation with error feedback in
                 fixed-point arithmetic",
  journal =      j-IEEE-TRANS-SIG-PROC,
  volume =       "41",
  number =       "5",
  pages =        "1953--1955",
  month =        may,
  year =         "1993",
  CODEN =        "ITPRED",
  ISSN =         "1053-587X (print), 1941-0476 (electronic)",
  ISSN-L =       "1053-587X",
  bibdate =      "Sat Jul 16 11:25:06 MDT 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "IEEE Transactions on Signal Processing",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=78",
  summary =      "The relationship between Hornor's method for
                 polynomial evaluation and a first-order recursive
                 filter with error feedback (EFB) is described. It is
                 shown that EFB is a useful technique for reducing the
                 roundoff errors that occur in evaluating a \ldots{}",
}


bibtype: inproceedings
filename: fparith.bib
label: Montuschi:1993:CSM
author: Paolo Montuschi and Luigi Ciminiera
title: $ n times n $ Carry-Save Multipliers without Final Addition
crossref: Swartzlander:1993:SCA
pages: 54--61
year: 1993
bibdate: Sat Nov 17 09:46:07 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.17 09:46:07 ???
URL: http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Montuschi.pdf
keywords: ARITH-11
acknowledgement: ack-nhfb
rawauthor: Paolo Montuschi and Luigi Ciminiera
rawtitle: $ n \times n $ Carry-Save Multipliers without Final Addition
entry:
@InProceedings{Montuschi:1993:CSM,
  author =       "Paolo Montuschi and Luigi Ciminiera",
  title =        "$ n \times n $ Carry-Save Multipliers without Final
                 Addition",
  crossref =     "Swartzlander:1993:SCA",
  pages =        "54--61",
  year =         "1993",
  bibdate =      "Sat Nov 17 09:46:07 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Montuschi.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-11",
}


bibtype: article
filename: fparith.bib
label: Montuschi:1993:RIT
author: P. Montuschi and L. Ciminiera
journal: j-IEEE-TRANS-COMPUT
volume: 42
number: 2
pages: 239--246
month: feb
monthnumber: 2
year: 1993
CODEN: ITCOB4
DOI: https://doi.org/10.1109/12.204797
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Thu Jul 7 07:58:47 MDT 2011
bibtimestamp: 2011.07.07 07:58:47 MDT
note: See remark cite Montuschi:1995:RRI.
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=204797
fjournal: IEEE Transactions on Computers
acknowledgement: ack-sfo
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: P. Montuschi and L. Ciminiera
rawnote: See remark \cite{Montuschi:1995:RRI}.
title:
Reducing iteration time when result digit is zero for radix $2$ SRT division and square root with redundant remainders

rawtitle:
Reducing iteration time when result digit is zero for radix $2$ {SRT} division and square root with redundant remainders

entry:
@Article{Montuschi:1993:RIT,
  author =       "P. Montuschi and L. Ciminiera",
  title =        "Reducing iteration time when result digit is zero for
                 radix $2$ {SRT} division and square root with redundant
                 remainders",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "42",
  number =       "2",
  pages =        "239--246",
  month =        feb,
  year =         "1993",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/12.204797",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Thu Jul 7 07:58:47 MDT 2011",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput1990.bib",
  note =         "See remark \cite{Montuschi:1995:RRI}.",
  URL =          "http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=204797",
  acknowledgement = ack-sfo # " and " # ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
  summary =      "A new architecture is presented for shared radix 2
                 division and square root whose main characteristic is
                 the ability to avoid any addition/subtraction, when the
                 digit 0 has been selected. The solution presented uses
                 a redundant representation of the \ldots{}",
}


bibtype: article
filename: fparith.bib
label: Motteler:1993:APF
author: Frederick C. Motteler
title: Arbitrary Precision Floating-Point Arithmetic
journal: j-DDJ
volume: 18
number: 9
pages: 28, 30, 32, 34, 84, 86--87
month: sep
monthnumber: 9
year: 1993
CODEN: DDJOEB
ISSN: 1044-789X OR 1044789X
bibdate: Tue Sep 03 09:15:43 1996
bibtimestamp: 1996.09.03 09:15:43 ???
fjournal: Dr. Dobb's Journal of Software Tools
acknowledgement: ack-nhfb
affiliation: Zetron Inc., Redmond, WA, USA
thesaurus: C listings; Digital arithmetic; Mathematics computing; Software portability; Subroutines
rawauthor: Frederick C. Motteler
rawtitle: Arbitrary Precision Floating-Point Arithmetic
bibsource:
http://www.ddj.com/index/author/index.htm; https://www.math.utah.edu/pub/tex/bib/fparith.bib; UnCover database

abstract:
The C library presented was developed with IEEE-754 compatibility and portability as its primary goals. Its first application was as part of a portable cross compiler. It is a general-purpose library that supports single, double, double-extended, and longer IEEE-754 like formats. The library has been ported to and tested on a variety of systems including CP/M, PCs running MS-DOS, PCs running Coherent, Sun 3s, Sparcstations (Sun's C compiler), and the IBM RS/6000 under AIX. The package is K and R, ANSI C, and C++ compatible. A table-driven tester included with the library checks if it has compiled properly. The tester also gives an idea of what the package is capable of doing.

keywords:
C library; Coherent; CP/M; Double-extended; Floating-point arithmetic; General-purpose library; IBM RS/6000; IEEE-754 compatibility; IEEE-754 like formats; MS-DOS; PCs; Portability; Portable cross compiler; Sparcstations; Sun 3s; Table-driven tester

rawabstract:
The C library presented was developed with IEEE-754 compatibility and portability as its primary goals. Its first application was as part of a portable cross compiler. It is a general-purpose library that supports single, double, double-extended, and longer IEEE-754 like formats. The library has been ported to and tested on a variety of systems including CP/M, PCs running MS-DOS, PCs running Coherent, Sun 3s, Sparcstations (Sun's C compiler), and the IBM RS/6000 under AIX. The package is K and R, ANSI C, and C++ compatible. A table-driven tester included with the library checks if it has compiled properly. The tester also gives an idea of what the package is capable of doing.

entry:
@Article{Motteler:1993:APF,
  author =       "Frederick C. Motteler",
  title =        "Arbitrary Precision Floating-Point Arithmetic",
  journal =      j-DDJ,
  volume =       "18",
  number =       "9",
  pages =        "28, 30, 32, 34, 84, 86--87",
  month =        sep,
  year =         "1993",
  CODEN =        "DDJOEB",
  ISSN =         "1044-789X",
  bibdate =      "Tue Sep 03 09:15:43 1996",
  bibsource =    "http://www.ddj.com/index/author/index.htm;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 UnCover database",
  abstract =     "The C library presented was developed with IEEE-754
                 compatibility and portability as its primary goals. Its
                 first application was as part of a portable cross
                 compiler. It is a general-purpose library that supports
                 single, double, double-extended, and longer IEEE-754
                 like formats. The library has been ported to and tested
                 on a variety of systems including CP/M, PCs running
                 MS-DOS, PCs running Coherent, Sun 3s, Sparcstations
                 (Sun's C compiler), and the IBM RS/6000 under AIX. The
                 package is K and R, ANSI C, and C++ compatible. A
                 table-driven tester included with the library checks if
                 it has compiled properly. The tester also gives an idea
                 of what the package is capable of doing.",
  acknowledgement = ack-nhfb,
  affiliation =  "Zetron Inc., Redmond, WA, USA",
  classification = "C5230 (Digital arithmetic methods); C7310
                 (Mathematics)",
  fjournal =     "Dr. Dobb's Journal of Software Tools",
  keywords =     "C library; Coherent; CP/M; Double-extended;
                 Floating-point arithmetic; General-purpose library; IBM
                 RS/6000; IEEE-754 compatibility; IEEE-754 like formats;
                 MS-DOS; PCs; Portability; Portable cross compiler;
                 Sparcstations; Sun 3s; Table-driven tester",
  thesaurus =    "C listings; Digital arithmetic; Mathematics computing;
                 Software portability; Subroutines",
}


bibtype: misc
filename: fparith.bib
label: Ng:1993:FV
author: K-C Ng
title: FDLIBM Version 5.3
pages: 28, 30, 32, 34, 84, 86--87
year: 1993
bibdate: Thu Oct 17 06:21:14 2019
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2019.10.17 06:21:14 ???
URL: http://www.netlib.org/fdlibm/readme
keywords: FDLIBM (Freely Distributable Math Library)
acknowledgement: ack-nhfb
howpublished: Web site
rawauthor: K-C Ng
rawtitle: {FDLIBM} Version 5.3
entry:
@Misc{Ng:1993:FV,
  author =       "K-C Ng",
  title =        "{FDLIBM} Version 5.3",
  howpublished = "Web site",
  year =         "1993",
  bibdate =      "Thu Oct 17 06:21:14 2019",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.netlib.org/fdlibm/readme",
  acknowledgement = ack-nhfb,
  keywords =     "FDLIBM (Freely Distributable Math Library)",
}


bibtype: inproceedings
filename: fparith.bib
label: Nguyen:1993:LDR
author: Q. H. Nguyen and I. Kollar
title: Limited dynamic range of spectrum analysis due to roundoff errors of the FFT
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 47--50
year: 1993
bibdate: Sat Jul 16 11:25:07 MDT 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.07.16 11:25:07 MDT
acknowledgement: ack-nhfb
rawauthor: Q. H. Nguyen and I. Kollar
rawtitle: Limited dynamic range of spectrum analysis due to roundoff errors of the {FFT}
booktitle:
Instrumentation and Measurement Technology Conference, 1993. IMTC/93. Conference Record., IEEE. 18--20 May 1993

rawbooktitle:
Instrumentation and Measurement Technology Conference, 1993. {IMTC/93}. Conference Record., {IEEE. 18--20} May 1993

entry:
@InProceedings{Nguyen:1993:LDR,
  author =       "Q. H. Nguyen and I. Kollar",
  booktitle =    "Instrumentation and Measurement Technology Conference,
                 1993. {IMTC/93}. Conference Record., {IEEE. 18--20} May
                 1993",
  title =        "Limited dynamic range of spectrum analysis due to
                 roundoff errors of the {FFT}",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "47--50",
  year =         "1993",
  CODEN =        "????",
  ISSN =         "????",
  bibdate =      "Sat Jul 16 11:25:07 MDT 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  summary =      "Roundoff errors of the block-float fast Fourier
                 transform (FFT) are treated. Special emphasis is given
                 to the case when signals containing sine waves are
                 analyzed. In the detection and analysis of sine waves,
                 root-mean-square values and overall \ldots{}",
}


bibtype: article
filename: fparith.bib
label: North:1993:FPA
author: R. C. North and J. R. Zeidler and W. H. Ku and T. R. Albert
journal: j-IEEE-TRANS-SIG-PROC
volume: 41
number: 5
pages: 1809--1823
month: may
monthnumber: 5
year: 1993
CODEN: ITPRED
ISSN: 1053-587X (print), 1941-0476 (electronic) OR 1053587X (print), 19410476 (electronic)
ISSNL: 1053-587X OR 1053587X
bibdate: Sat Jul 16 08:40:52 MDT 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.07.16 08:40:52 MDT
fjournal: IEEE Transactions on Signal Processing
acknowledgement: ack-nhfb
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=78
rawauthor: R. C. North and J. R. Zeidler and W. H. Ku and T. R. Albert
title:
A floating-point arithmetic error analysis of direct and indirect coefficient updating techniques for adaptive lattice filters

rawtitle:
A floating-point arithmetic error analysis of direct and indirect coefficient updating techniques for adaptive lattice filters

entry:
@Article{North:1993:FPA,
  author =       "R. C. North and J. R. Zeidler and W. H. Ku and T. R.
                 Albert",
  title =        "A floating-point arithmetic error analysis of direct
                 and indirect coefficient updating techniques for
                 adaptive lattice filters",
  journal =      j-IEEE-TRANS-SIG-PROC,
  volume =       "41",
  number =       "5",
  pages =        "1809--1823",
  month =        may,
  year =         "1993",
  CODEN =        "ITPRED",
  ISSN =         "1053-587X (print), 1941-0476 (electronic)",
  ISSN-L =       "1053-587X",
  bibdate =      "Sat Jul 16 08:40:52 MDT 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "IEEE Transactions on Signal Processing",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=78",
  summary =      "The ways in which finite precision arithmetic effects
                 can deleteriously manifest themselves in both the
                 stochastic gradient and the recursive least squares
                 adaptive lattice filters are discussed. closed form
                 expressions are derived for the steady-state \ldots{}",
}


bibtype: article
filename: fparith.bib
label: Ozawa:1993:SAE
author: K. Ozawa and M. Miyazaki
title: A summation algorithm with error correction for parallel computers
journal: j-SYS-COMP-JAPAN
volume: 24
number: 7
pages: 62--68
year: 1993
CODEN: SCJAEP
ISSN: 0882-1666 (print), 1520-684X (electronic) OR 08821666 (print), 1520684X (electronic)
ISSNL: 0882-1666 OR 08821666
bibdate: Tue Dec 12 09:29:07 MST 1995
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1995.12.12 09:29:07 MST
fjournal: Systems and computers in Japan
acknowledgement: ack-nhfb
affiliation: Coll. of Gen. Educ., Tohoku University, Sendai, Japan
thesaurus: computational complexity; error correction; parallel algorithms
rawauthor: K. Ozawa and M. Miyazaki
rawtitle: A summation algorithm with error correction for parallel computers
abstract:
Proposes an algorithm to accurately compute the sum of floating-point numbers on parallel computers. This algorithm is an extension of the well-known recursive doubling technique which computes the sum of n floating-point number in log/sub 2/n parallel steps. The time complexity of the present algorithm also is O(logn), and the space complexity is O(n). This algorithm enables a highly accurate result to be obtained with guarantee. The theoretical analysis and the numerical experiments on a parallel computer show that this algorithm is as accurate as Kahan's, which is the fastest and an accurate serial algorithm for the summation of the numbers, and also that the present algorithm is faster than Kahan's provided that two or more processors are available.

keywords:
accurate floating-point summation; correct rounding; error correction; floating-point numbers; guaranteed accuracy; parallel computation; parallel computers; recursive doubling; recursive doubling technique; round-off error analysis; space complexity; summation; summation algorithm; time complexity

rawabstract:
Proposes an algorithm to accurately compute the sum of floating-point numbers on parallel computers. This algorithm is an extension of the well-known recursive doubling technique which computes the sum of n floating-point number in log/sub 2/n parallel steps. The time complexity of the present algorithm also is O(logn), and the space complexity is O(n). This algorithm enables a highly accurate result to be obtained with guarantee. The theoretical analysis and the numerical experiments on a parallel computer show that this algorithm is as accurate as Kahan's, which is the fastest and an accurate serial algorithm for the summation of the numbers, and also that the present algorithm is faster than Kahan's provided that two or more processors are available.

entry:
@Article{Ozawa:1993:SAE,
  author =       "K. Ozawa and M. Miyazaki",
  title =        "A summation algorithm with error correction for
                 parallel computers",
  journal =      j-SYS-COMP-JAPAN,
  volume =       "24",
  number =       "7",
  pages =        "62--68",
  month =        "????",
  year =         "1993",
  CODEN =        "SCJAEP",
  ISSN =         "0882-1666 (print), 1520-684X (electronic)",
  ISSN-L =       "0882-1666",
  bibdate =      "Tue Dec 12 09:29:07 MST 1995",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "Proposes an algorithm to accurately compute the sum of
                 floating-point numbers on parallel computers. This
                 algorithm is an extension of the well-known recursive
                 doubling technique which computes the sum of n
                 floating-point number in log/sub 2/n parallel steps.
                 The time complexity of the present algorithm also is
                 O(logn), and the space complexity is O(n). This
                 algorithm enables a highly accurate result to be
                 obtained with guarantee. The theoretical analysis and
                 the numerical experiments on a parallel computer show
                 that this algorithm is as accurate as Kahan's, which is
                 the fastest and an accurate serial algorithm for the
                 summation of the numbers, and also that the present
                 algorithm is faster than Kahan's provided that two or
                 more processors are available.",
  acknowledgement = ack-nhfb,
  affiliation =  "Coll. of Gen. Educ., Tohoku University, Sendai,
                 Japan",
  classification = "C4110 (Error analysis in numerical methods); C4240P
                 (Parallel programming and algorithm theory)",
  fjournal =     "Systems and computers in Japan",
  keywords =     "accurate floating-point summation; correct rounding;
                 error correction; floating-point numbers; guaranteed
                 accuracy; parallel computation; parallel computers;
                 recursive doubling; recursive doubling technique;
                 round-off error analysis; space complexity; summation;
                 summation algorithm; time complexity",
  thesaurus =    "computational complexity; error correction; parallel
                 algorithms",
}


bibtype: phdthesis
filename: fparith.bib
label: Pan:1993:TFVa
author: Jing Pan
type: Thesis (Ph.D.)
school: Computer Science Department, University of California, Davis
address: Davis, CA, USA
pages: 221
year: 1993
bibdate: Sat Feb 24 15:01:45 MST 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.02.24 15:01:45 MST
acknowledgement: ack-nhfb
rawauthor: Jing Pan
title:
Toward a formal verification of a floating-point coprocessor and its composition with a central processing unit

rawtitle:
Toward a formal verification of a floating-point coprocessor and its composition with a central processing unit

entry:
@PhdThesis{Pan:1993:TFVa,
  author =       "Jing Pan",
  title =        "Toward a formal verification of a floating-point
                 coprocessor and its composition with a central
                 processing unit",
  type =         "Thesis ({Ph.D.})",
  school =       "Computer Science Department, University of California,
                 Davis",
  address =      "Davis, CA, USA",
  pages =        "221",
  year =         "1993",
  bibdate =      "Sat Feb 24 15:01:45 MST 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
}


bibtype: article
filename: fparith.bib
label: Pan:1993:TFVb
author: Jing Pan and K. N. Levitt and M. Archer and S. Kalvala
journal: j-IFIP-TRANS-A
volume: A20
pages: 427--447
year: 1993
CODEN: ITATEC
ISSN: 0926-5473 OR 09265473
bibdate: Tue Dec 12 09:27:13 MST 1995
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1995.12.12 09:27:13 MST
fjournal: IFIP Transactions. A. Computer Science and Technology
acknowledgement: ack-nhfb
affiliation: Department of Computer Science, California University, Davis, CA, USA
thesaurus: Digital arithmetic; Formal verification; Microprocessor chips; Theorem proving
rawauthor: Jing Pan and K. N. Levitt and M. Archer and S. Kalvala
title:
Towards a formal verification of a floating point coprocessor and its composition with a central processing unit

note:
Higher Order Logic Theorem Proving and its Applications IFIP TC / WG10.2 International Workshop - HOL '92.

abstract:
The authors discuss verification (ultimately down to the microcode level) of a microprocessor that consists of a central processing unit that is the master of a floating point coprocessor; the design is drawn from the MC68881 floating point coprocessor slaved to the MC68000, but greatly simplified. The coprocessor in isolation is verified with respect to a specification that captures the IEEE floating point standard. In the authors system, CPU and floating point instructions are allowed to execute concurrently, but the appearance to the programmer of the composed system is that of a sequentially executing instruction stream. The CPU and floating point coprocessor communicate through the four-phase handshaking protocol. The verification involves reasoning about a form of behavioural abstraction wherein concurrently executing instruction steams are mapped to a sequential stream.

keywords:
Behavioural abstraction; Central processing unit; Concurrently executing instruction steams; Floating point coprocessor; Formal verification; Four-phase handshaking protocol; MC68000; MC68881; Microprocessor; Reasoning; Sequentially executing instruction stream; Specification

rawabstract:
The authors discuss verification (ultimately down to the microcode level) of a microprocessor that consists of a central processing unit that is the master of a floating point coprocessor; the design is drawn from the MC68881 floating point coprocessor slaved to the MC68000, but greatly simplified. The coprocessor in isolation is verified with respect to a specification that captures the IEEE floating point standard. In the authors system, CPU and floating point instructions are allowed to execute concurrently, but the appearance to the programmer of the composed system is that of a sequentially executing instruction stream. The CPU and floating point coprocessor communicate through the four-phase handshaking protocol. The verification involves reasoning about a form of behavioural abstraction wherein concurrently executing instruction steams are mapped to a sequential stream.

rawnote:
Higher Order Logic Theorem Proving and its Applications IFIP TC\slash WG10.2 International Workshop - HOL '92.

rawtitle:
Towards a formal verification of a floating point coprocessor and its composition with a central processing unit

entry:
@Article{Pan:1993:TFVb,
  author =       "Jing Pan and K. N. Levitt and M. Archer and S.
                 Kalvala",
  title =        "Towards a formal verification of a floating point
                 coprocessor and its composition with a central
                 processing unit",
  journal =      j-IFIP-TRANS-A,
  volume =       "A20",
  pages =        "427--447",
  month =        "????",
  year =         "1993",
  CODEN =        "ITATEC",
  ISSN =         "0926-5473",
  bibdate =      "Tue Dec 12 09:27:13 MST 1995",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  note =         "Higher Order Logic Theorem Proving and its
                 Applications IFIP TC\slash WG10.2 International
                 Workshop - HOL '92.",
  abstract =     "The authors discuss verification (ultimately down to
                 the microcode level) of a microprocessor that consists
                 of a central processing unit that is the master of a
                 floating point coprocessor; the design is drawn from
                 the MC68881 floating point coprocessor slaved to the
                 MC68000, but greatly simplified. The coprocessor in
                 isolation is verified with respect to a specification
                 that captures the IEEE floating point standard. In the
                 authors system, CPU and floating point instructions are
                 allowed to execute concurrently, but the appearance to
                 the programmer of the composed system is that of a
                 sequentially executing instruction stream. The CPU and
                 floating point coprocessor communicate through the
                 four-phase handshaking protocol. The verification
                 involves reasoning about a form of behavioural
                 abstraction wherein concurrently executing instruction
                 steams are mapped to a sequential stream.",
  acknowledgement = ack-nhfb,
  affiliation =  "Department of Computer Science, California University,
                 Davis, CA, USA",
  classification = "C4210 (Formal logic); C5130 (Microprocessor chips);
                 C5230 (Digital arithmetic methods); C6110B (Software
                 engineering techniques)",
  confdate =     "21-24 Sept. 1992",
  conflocation = "Leuven, Belgium",
  fjournal =     "IFIP Transactions. A. Computer Science and
                 Technology",
  keywords =     "Behavioural abstraction; Central processing unit;
                 Concurrently executing instruction steams; Floating
                 point coprocessor; Formal verification; Four-phase
                 handshaking protocol; MC68000; MC68881; Microprocessor;
                 Reasoning; Sequentially executing instruction stream;
                 Specification",
  pubcountry =   "Netherlands",
  thesaurus =    "Digital arithmetic; Formal verification;
                 Microprocessor chips; Theorem proving",
}


bibtype: inproceedings
filename: fparith.bib
label: Panneerselvam:1993:MAF
author: G. Panneerselvam and B. Nowrouzian
title: Multiply-add fused RISC architectures for DSP applications
crossref: IEEE:1993:PIP
volume: 1
pages: 108--111
year: 1993
DOI: https://doi.org/10.1109/PACRIM.1993.407210
bibdate: Sun Feb 20 10:47:10 2011
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2011.02.20 10:47:10 ???
acknowledgement: ack-nhfb
rawauthor: G. Panneerselvam and B. Nowrouzian
rawtitle: Multiply-add fused {RISC} architectures for {DSP} applications
abstract:
The development of a fixed-point bit-parallel multiply-add fused (MAF) architecture together with a corresponding VLSI implementation is presented. The proposed MAF implementation employs 1.2 CMOS technology. This MAF implementation finds a variety of practical applications in high-speed real-time digital signal processing. The MAF implementation employs a parallel modified Booth multiplier incorporating an array of carry-save adders for the addition of the intermediate partial products, and a hardware efficient carry-skip adder for carry propagation. The performance characteristics of the MAF implementation have been successfully verified by an HSPICE simulation at speeds of up to 100 MHz.

rawabstract:
The development of a fixed-point bit-parallel multiply-add fused (MAF) architecture together with a corresponding VLSI implementation is presented. The proposed MAF implementation employs 1.2 CMOS technology. This MAF implementation finds a variety of practical applications in high-speed real-time digital signal processing. The MAF implementation employs a parallel modified Booth multiplier incorporating an array of carry-save adders for the addition of the intermediate partial products, and a hardware efficient carry-skip adder for carry propagation. The performance characteristics of the MAF implementation have been successfully verified by an HSPICE simulation at speeds of up to 100 MHz.

entry:
@InProceedings{Panneerselvam:1993:MAF,
  author =       "G. Panneerselvam and B. Nowrouzian",
  title =        "Multiply-add fused {RISC} architectures for {DSP}
                 applications",
  crossref =     "IEEE:1993:PIP",
  volume =       "1",
  pages =        "108--111",
  year =         "1993",
  DOI =          "https://doi.org/10.1109/PACRIM.1993.407210",
  bibdate =      "Sun Feb 20 10:47:10 2011",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "The development of a fixed-point bit-parallel
                 multiply-add fused (MAF) architecture together with a
                 corresponding VLSI implementation is presented. The
                 proposed MAF implementation employs 1.2 CMOS
                 technology. This MAF implementation finds a variety of
                 practical applications in high-speed real-time digital
                 signal processing. The MAF implementation employs a
                 parallel modified Booth multiplier incorporating an
                 array of carry-save adders for the addition of the
                 intermediate partial products, and a hardware efficient
                 carry-skip adder for carry propagation. The performance
                 characteristics of the MAF implementation have been
                 successfully verified by an HSPICE simulation at speeds
                 of up to 100 MHz.",
  acknowledgement = ack-nhfb,
}


bibtype: article
filename: fparith.bib
label: Parhami:1993:IAS
author: B. Parhami
title: On the implementation of arithmetic support functions for generalized signed-digit number systems
journal: j-IEEE-TRANS-COMPUT
volume: 42
number: 3
pages: 379--384
month: mar
monthnumber: 3
year: 1993
CODEN: ITCOB4
DOI: https://doi.org/10.1109/12.210182
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Thu Jul 7 07:58:48 MDT 2011
bibtimestamp: 2011.07.07 07:58:48 MDT
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=210182
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: B. Parhami
rawtitle: On the implementation of arithmetic support functions for generalized signed-digit number systems
entry:
@Article{Parhami:1993:IAS,
  author =       "B. Parhami",
  title =        "On the implementation of arithmetic support functions
                 for generalized signed-digit number systems",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "42",
  number =       "3",
  pages =        "379--384",
  month =        mar,
  year =         "1993",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/12.210182",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Thu Jul 7 07:58:48 MDT 2011",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput1990.bib",
  URL =          "http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=210182",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
}


bibtype: article
filename: fparith.bib
label: Parker:1993:OHS
author: A. Parker
title: Optimization of high speed function generation using table-lookup
journal: j-TRANS-SOC-COMP-SIM
volume: 10
number: 2
pages: 105--114
month: jun
monthnumber: 6
year: 1993
CODEN: TSCSEV
ISSN: 0740-6797 OR 07406797
bibdate: Tue Dec 12 09:29:07 MST 1995
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1995.12.12 09:29:07 MST
fjournal: Transactions of the Society for Computer Simulation
acknowledgement: ack-nhfb
affiliation: Department of Electr. and Comput. Eng., Alabama University, Huntsville, AL, USA
thesaurus: Equivalence classes; Function evaluation; Symbol manipulation; Table lookup
rawauthor: A. Parker
rawtitle: Optimization of high speed function generation using table-lookup
abstract:
A process is presented for the use of generic operator optimization for the evaluation of unary floating point functions using table lookup. The process involves the identification of an underlying architecture and the symbolic-numeric optimization of operators to minimize a least-squares representation of total error. The approach is illustrated for the case of floating point division.

keywords:
Floating point division; High speed function generation; Least-squares representation; Symbolic-numeric optimization; Table lookup

rawabstract:
A process is presented for the use of generic operator optimization for the evaluation of unary floating point functions using table lookup. The process involves the identification of an underlying architecture and the symbolic-numeric optimization of operators to minimize a least-squares representation of total error. The approach is illustrated for the case of floating point division.

entry:
@Article{Parker:1993:OHS,
  author =       "A. Parker",
  title =        "Optimization of high speed function generation using
                 table-lookup",
  journal =      j-TRANS-SOC-COMP-SIM,
  volume =       "10",
  number =       "2",
  pages =        "105--114",
  month =        jun,
  year =         "1993",
  CODEN =        "TSCSEV",
  ISSN =         "0740-6797",
  bibdate =      "Tue Dec 12 09:29:07 MST 1995",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "A process is presented for the use of generic operator
                 optimization for the evaluation of unary floating point
                 functions using table lookup. The process involves the
                 identification of an underlying architecture and the
                 symbolic-numeric optimization of operators to minimize
                 a least-squares representation of total error. The
                 approach is illustrated for the case of floating point
                 division.",
  acknowledgement = ack-nhfb,
  affiliation =  "Department of Electr. and Comput. Eng., Alabama
                 University, Huntsville, AL, USA",
  classification = "C1160 (Combinatorial mathematics); C4120 (Functional
                 analysis); C6130 (Data handling techniques)",
  fjournal =     "Transactions of the Society for Computer Simulation",
  keywords =     "Floating point division; High speed function
                 generation; Least-squares representation;
                 Symbolic-numeric optimization; Table lookup",
  thesaurus =    "Equivalence classes; Function evaluation; Symbol
                 manipulation; Table lookup",
}


bibtype: book
filename: fparith.bib
label: Pichat:1993:IDC
author: Michele Pichat and Jean Vignes
title: Ingenierie du controle de la precision des calculs sur ordinateur
publisher: Editions Technip
address: Paris, France
pages: xvii + 233
year: 1993
ISBN: 2-7108-0653-3 OR 2710806533
ISBN13: 978-2-7108-0653-0 OR 9782710806530
LCCN: TJ213 .P478 1993
bibdate: Wed Nov 24 12:28:18 2004
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; z3950.loc.gov:7090/Voyager
bibtimestamp: 2004.11.24 12:28:18 ???
series: Collection Informatique
subject: Automatic control; Microcomputers
acknowledgement: ack-nhfb
rawauthor: Mich{\`e}le Pichat and Jean Vignes
rawtitle: Ing{\'e}nierie du contr{\^o}le de la pr{\'e}cision des calculs sur ordinateur
entry:
@Book{Pichat:1993:IDC,
  author =       "Mich{\`e}le Pichat and Jean Vignes",
  title =        "Ing{\'e}nierie du contr{\^o}le de la pr{\'e}cision des
                 calculs sur ordinateur",
  publisher =    "Editions Technip",
  address =      "Paris, France",
  pages =        "xvii + 233",
  year =         "1993",
  ISBN =         "2-7108-0653-3",
  ISBN-13 =      "978-2-7108-0653-0",
  LCCN =         "TJ213 .P478 1993",
  bibdate =      "Wed Nov 24 12:28:18 2004",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 z3950.loc.gov:7090/Voyager",
  series =       "Collection Informatique",
  acknowledgement = ack-nhfb,
  subject =      "Automatic control; Microcomputers",
}


bibtype: article
filename: fparith.bib
label: Plauger:1993:FCE
author: P. J. Plauger
title: Floating-Point C Extensions
journal: j-CUJ
volume: 11
type: Standard C
number: 9
pages: 10--??
month: sep
monthnumber: 9
year: 1993
ISSN: 0898-9788 OR 08989788
bibdate: Fri Aug 30 16:52:23 MDT 1996
bibsource: http://www.cuj.com/cbklist.htm; https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.08.30 16:52:23 MDT
fjournal: C Users Journal
acknowledgement: ack-nhfb
rawauthor: P. J. Plauger
rawtitle: Floating-Point {C} Extensions
entry:
@Article{Plauger:1993:FCE,
  author =       "P. J. Plauger",
  title =        "Floating-Point {C} Extensions",
  journal =      j-CUJ,
  volume =       "11",
  type =         "{Standard C}",
  number =       "9",
  pages =        "10--??",
  month =        sep,
  year =         "1993",
  ISSN =         "0898-9788",
  bibdate =      "Fri Aug 30 16:52:23 MDT 1996",
  bibsource =    "http://www.cuj.com/cbklist.htm;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "C Users Journal",
}


bibtype: book
filename: fparith.bib
label: Plauger:1993:PPIc
author: P. J. Plauger
title: Programming on Purpose III: Essays on Software Technology
volume: 3
publisher: pub-PHPTR
address: pub-PHPTR:adr
pages: viii + 224
year: 1993
ISBN: 0-13-328113-2 OR 0133281132
ISBN13: 978-0-13-328113-2 OR 9780133281132
LCCN: QA76.76.D47 P53 1994
bibdate: Wed Jul 6 14:26:01 1994
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/master.bib
bibtimestamp: 1994.07.06 14:26:01 ???
acknowledgement: ack-nhfb
rawauthor: P. J. Plauger
rawtitle: Programming on Purpose {III}: Essays on Software Technology
remark:
Originally published in the author's monthly column in Computer language magazine, 1986-1992. Contents: Volume I: Essays on software design -- volume II: Essays on software people -- volume III: Essays on software technology.

TOC:
You Must Be Joking Computer Arithmetic Floating-Point Arithmetic The Central Folly Safe Math Do-It-Yourself Math Functions Locking the Barn Door Half a Secret It's (Almost) Alive The (Almost) Right Stuff Instant Lies What Meets the Eye Technicolor and Cinemascope What Meets the Ear Warm Fuzzies Font Follies Text Editors Approximating Functions Economizing Polynomials Technical Writing All I Want to Do Is Programming for the Billions All Sorts of Sorts Transforming Strings Books for Our Times Through the Grapevine List of Columns Bibliography Index

rawTOC:
You Must Be Joking \\ Computer Arithmetic \\ Floating-Point Arithmetic \\ The Central Folly \\ Safe Math \\ Do-It-Yourself Math Functions \\ Locking the Barn Door \\ Half a Secret \\ It's (Almost) Alive \\ The (Almost) Right Stuff \\ Instant Lies \\ What Meets the Eye \\ Technicolor and Cinemascope \\ What Meets the Ear \\ Warm Fuzzies \\ Font Follies \\ Text Editors \\ Approximating Functions \\ Economizing Polynomials \\ Technical Writing \\ All I Want to Do Is \\ Programming for the Billions \\ All Sorts of Sorts \\ Transforming Strings \\ Books for Our Times \\ Through the Grapevine \\ List of Columns \\ Bibliography \\ Index

entry:
@Book{Plauger:1993:PPIc,
  author =       "P. J. Plauger",
  title =        "Programming on Purpose {III}: Essays on Software
                 Technology",
  volume =       "3",
  publisher =    pub-PHPTR,
  address =      pub-PHPTR:adr,
  pages =        "viii + 224",
  year =         "1993",
  ISBN =         "0-13-328113-2",
  ISBN-13 =      "978-0-13-328113-2",
  LCCN =         "QA76.76.D47 P53 1994",
  bibdate =      "Wed Jul 6 14:26:01 1994",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/master.bib",
  price =        "US\$19.95",
  acknowledgement = ack-nhfb,
  libnote =      "Not yet in my library.",
  remark =       "Originally published in the author's monthly column in
                 Computer language magazine, 1986-1992. Contents: Volume
                 I: Essays on software design -- volume II: Essays on
                 software people -- volume III: Essays on software
                 technology.",
  tableofcontents = "You Must Be Joking \\
                 Computer Arithmetic \\
                 Floating-Point Arithmetic \\
                 The Central Folly \\
                 Safe Math \\
                 Do-It-Yourself Math Functions \\
                 Locking the Barn Door \\
                 Half a Secret \\
                 It's (Almost) Alive \\
                 The (Almost) Right Stuff \\
                 Instant Lies \\
                 What Meets the Eye \\
                 Technicolor and Cinemascope \\
                 What Meets the Ear \\
                 Warm Fuzzies \\
                 Font Follies \\
                 Text Editors \\
                 Approximating Functions \\
                 Economizing Polynomials \\
                 Technical Writing \\
                 All I Want to Do Is \\
                 Programming for the Billions \\
                 All Sorts of Sorts \\
                 Transforming Strings \\
                 Books for Our Times \\
                 Through the Grapevine \\
                 List of Columns \\
                 Bibliography \\
                 Index",
}


bibtype: article
filename: fparith.bib
label: Posch:1993:BKR
author: K. C. Posch and R. Posch
journal: j-COMPUTING
volume: 50
number: 2
pages: 93--104
year: 1993
CODEN: CMPTA2
ISSN: 0010-485X (print), 1436-5057 (electronic) OR 0010485X (print), 14365057 (electronic)
ISSNL: 0010-485X OR 0010485X
MRclass: 68M07 (11Y16)
MRnumber: 94e:68024
bibdate: Mon Oct 11 20:38:38 MDT 1999
bibtimestamp: 1999.10.11 20:38:38 MDT
fjournal: Computing: Archiv fur informatik und numerik
language: German
acknowledgement: ack-nhfb
journalURL: http://link.springer.com/journal/607
rawauthor: K. C. Posch and R. Posch
title:
Basiserweiterung mit einer Konvolutionssumme in Restklassenzahlensystemen. (German) [Base Extension Using a Convolution Sum in Residue Number Systems]

bibsource:
http://springerlink.metapress.com/openurl.asp?genre=journal&issn=0010-485X; https://www.math.utah.edu/pub/tex/bib/fparith.bib; MathSciNet database; OCLC Contents1st database

rawtitle:
{Basiserweiterung mit einer Konvolutionssumme in Restklassenzahlensystemen}. ({German}) [{Base} Extension Using a Convolution Sum in Residue Number Systems]

entry:
@Article{Posch:1993:BKR,
  author =       "K. C. Posch and R. Posch",
  title =        "{Basiserweiterung mit einer Konvolutionssumme in
                 Restklassenzahlensystemen}. ({German}) [{Base}
                 Extension Using a Convolution Sum in Residue Number
                 Systems]",
  journal =      j-COMPUTING,
  volume =       "50",
  number =       "2",
  pages =        "93--104",
  year =         "1993",
  CODEN =        "CMPTA2",
  ISSN =         "0010-485X (print), 1436-5057 (electronic)",
  ISSN-L =       "0010-485X",
  MRclass =      "68M07 (11Y16)",
  MRnumber =     "94e:68024",
  bibdate =      "Mon Oct 11 20:38:38 MDT 1999",
  bibsource =    "http://springerlink.metapress.com/openurl.asp?genre=journal&issn=0010-485X;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 MathSciNet database; OCLC Contents1st database",
  acknowledgement = ack-nhfb,
  fjournal =     "Computing: Archiv f{\"u}r informatik und numerik",
  journal-URL =  "http://link.springer.com/journal/607",
  language =     "German",
}


bibtype: article
filename: fparith.bib
label: Pugh:1993:FPC
author: Kenneth Pugh
title: Floating Point Constants
journal: j-CUJ
volume: 11
type: Questions and Answers
number: 10
pages: 130--??
month: oct
monthnumber: 10
year: 1993
ISSN: 0898-9788 OR 08989788
bibdate: Fri Aug 30 16:52:23 MDT 1996
bibsource: http://www.cuj.com/cbklist.htm; https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.08.30 16:52:23 MDT
fjournal: C Users Journal
acknowledgement: ack-nhfb
rawauthor: Kenneth Pugh
rawtitle: Floating Point Constants
entry:
@Article{Pugh:1993:FPC,
  author =       "Kenneth Pugh",
  title =        "Floating Point Constants",
  journal =      j-CUJ,
  volume =       "11",
  type =         "Questions and Answers",
  number =       "10",
  pages =        "130--??",
  month =        oct,
  year =         "1993",
  ISSN =         "0898-9788",
  bibdate =      "Fri Aug 30 16:52:23 MDT 1996",
  bibsource =    "http://www.cuj.com/cbklist.htm;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "C Users Journal",
}


bibtype: article
filename: fparith.bib
label: Reid:1993:LIA
author: John Reid
title: Language Independent Arithmetic (LIA) --- a Draft International Standard (DIS)
journal: j-SIGNUM
volume: 28
number: 1
pages: 2--7
month: jan
monthnumber: 1
year: 1993
CODEN: SNEWD6
ISSN: 0163-5778 (print), 1558-0237 (electronic) OR 01635778 (print), 15580237 (electronic)
ISSNL: 0163-5778 OR 01635778
bibdate: Tue Apr 12 07:50:23 MDT 2005
bibsource: http://portal.acm.org/; https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.04.12 07:50:23 MDT
fjournal: ACM SIGNUM Newsletter
acknowledgement: ack-nhfb
affiliation: Rutherford Appleton Lab., Didcot, UK
journalURL: http://portal.acm.org/browse_dl.cfm?idx=J690
thesaurus: Digital arithmetic; High level languages; Standards
rawauthor: John Reid
rawtitle: {Language Independent Arithmetic} ({LIA}) --- a {Draft International Standard} ({DIS})
note:
LIA is now an International Standard, ISO/IEC 10967-1:1994; it is ``92 pages of small print, densely mathematical, not counting 8 pages of front matter, and it is not available electronically.'' Its adoption has been rather controversial.

abstract:
The UK and US votes have been decided on the draft international standard ISO/IEC CD 10967-1:1992: language independent arithmetic-part 1: integer and floating point arithmetic. The stated goals of the draft are: to enhance the portability of numeric programs across a wide range of numeric architectures. To help programming languages express the semantics of their numerical types. It defines integer and (normalized and denormalized) floating point types. It defines integer and (normalized and denormalized) floating point types. It specifies the primitive computational operations with source and destination operands of the same type, comparison operations on two operands of the same type, and conversions from any arithmetic type to any other arithmetic type. The values of parameters define the exact arithmetic behaviour of any particular platform.

keywords:
International standard; Language independent arithmetic; Numeric architectures; Numeric programs; Portability; Programming languages

rawabstract:
The UK and US votes have been decided on the draft international standard ISO/IEC CD 10967-1:1992: language independent arithmetic-part 1: integer and floating point arithmetic. The stated goals of the draft are: to enhance the portability of numeric programs across a wide range of numeric architectures. To help programming languages express the semantics of their numerical types. It defines integer and (normalized and denormalized) floating point types. It defines integer and (normalized and denormalized) floating point types. It specifies the primitive computational operations with source and destination operands of the same type, comparison operations on two operands of the same type, and conversions from any arithmetic type to any other arithmetic type. The values of parameters define the exact arithmetic behaviour of any particular platform.

entry:
@Article{Reid:1993:LIA,
  author =       "John Reid",
  title =        "{Language Independent Arithmetic} ({LIA}) --- a {Draft
                 International Standard} ({DIS})",
  journal =      j-SIGNUM,
  volume =       "28",
  number =       "1",
  pages =        "2--7",
  month =        jan,
  year =         "1993",
  CODEN =        "SNEWD6",
  ISSN =         "0163-5778 (print), 1558-0237 (electronic)",
  ISSN-L =       "0163-5778",
  bibdate =      "Tue Apr 12 07:50:23 MDT 2005",
  bibsource =    "http://portal.acm.org/;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  note =         "LIA is now an International Standard, ISO/IEC
                 10967-1:1994; it is ``92 pages of small print, densely
                 mathematical, not counting 8 pages of front matter, and
                 it is not available electronically.'' Its adoption has
                 been rather controversial.",
  abstract =     "The UK and US votes have been decided on the draft
                 international standard ISO/IEC CD 10967-1:1992:
                 language independent arithmetic-part 1: integer and
                 floating point arithmetic. The stated goals of the
                 draft are: to enhance the portability of numeric
                 programs across a wide range of numeric architectures.
                 To help programming languages express the semantics of
                 their numerical types. It defines integer and
                 (normalized and denormalized) floating point types. It
                 defines integer and (normalized and denormalized)
                 floating point types. It specifies the primitive
                 computational operations with source and destination
                 operands of the same type, comparison operations on two
                 operands of the same type, and conversions from any
                 arithmetic type to any other arithmetic type. The
                 values of parameters define the exact arithmetic
                 behaviour of any particular platform.",
  acknowledgement = ack-nhfb,
  affiliation =  "Rutherford Appleton Lab., Didcot, UK",
  classification = "C5230 (Digital arithmetic methods); C6140D (High
                 level languages)",
  fjournal =     "ACM SIGNUM Newsletter",
  journal-URL =  "http://portal.acm.org/browse_dl.cfm?idx=J690",
  keywords =     "International standard; Language independent
                 arithmetic; Numeric architectures; Numeric programs;
                 Portability; Programming languages",
  thesaurus =    "Digital arithmetic; High level languages; Standards",
}


bibtype: inproceedings
filename: fparith.bib
label: Richardson:1993:ETR
author: S. E. Richardson
title: Exploiting trivial and redundant computation
crossref: Swartzlander:1993:SCA
pages: 220--227
year: 1993
bibdate: Thu Jun 20 10:16:15 2002
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2002.06.20 10:16:15 ???
URL: http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Richardson.pdf
keywords: ARITH-11
acknowledgement: ack-sfo
rawauthor: S. E. Richardson
rawtitle: Exploiting trivial and redundant computation
entry:
@InProceedings{Richardson:1993:ETR,
  author =       "S. E. Richardson",
  title =        "Exploiting trivial and redundant computation",
  crossref =     "Swartzlander:1993:SCA",
  pages =        "220--227",
  year =         "1993",
  bibdate =      "Thu Jun 20 10:16:15 2002",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Richardson.pdf",
  acknowledgement = ack-sfo # " and " # ack-nhfb,
  keywords =     "ARITH-11",
}


bibtype: article
filename: fparith.bib
label: Ris:1993:WFP
author: Fred Ris and Ed Barkmeyer and Craig Schaffert and Peter Farkas
title: When Floating-Point Addition Isn't Commutative
journal: j-SIGNUM
volume: 28
number: 1
pages: 8--13
month: jan
monthnumber: 1
year: 1993
CODEN: SNEWD6
DOI: https://doi.org/10.1145/156301.156303
ISSN: 0163-5778 (print), 1558-0237 (electronic) OR 01635778 (print), 15580237 (electronic)
ISSNL: 0163-5778 OR 01635778
bibdate: Tue Apr 12 07:50:23 MDT 2005
bibtimestamp: 2005.04.12 07:50:23 MDT
fjournal: ACM SIGNUM Newsletter
acknowledgement: ack-nhfb
affiliation: IBM Federal Syst. Co., Boulder, CO, USA
journalURL: http://portal.acm.org/browse_dl.cfm?idx=J690
thesaurus: Digital arithmetic; Standards
rawauthor: Fred Ris and Ed Barkmeyer and Craig Schaffert and Peter Farkas
rawtitle: When Floating-Point Addition Isn't Commutative
bibsource:
ftp://garbo.uwasa.fi/pc/doc-soft/fpbibl18.zip; http://portal.acm.org/; https://www.math.utah.edu/pub/tex/bib/fparith.bib

abstract:
In the early 1980s, the IEEE floating-point standards (754 for binary formats adopted in 1985 and 854 for more general situations adopted in 1987) were developed. There are now many more-or-less IEEE 754 conformant products on the market. A fully compliant implementation must provide conforming representations of floating-point values, perform arithmetic operations as specified by the standard, provide four rounding modes and five exception flags defined by the standard, support infinities, NaNs, signed zeros, and unordered comparisons, and provide access to all these features from programming languages (as supported by the compiler and runtime library). Not surprisingly, very few implementations comply fully with the IEEE 754 standard in all respects. But one might imagine that if there were such compliance one could expect bit-for-bit identical results for a given algorithm executed on any conforming implementation. The paper explains why this is not always the case.

keywords:
Arithmetic operations; Conforming implementation; Exception flags; Floating-point addition; Floating-point values; IEEE 754; IEEE floating-point standards; Rounding modes

rawabstract:
In the early 1980s, the IEEE floating-point standards (754 for binary formats adopted in 1985 and 854 for more general situations adopted in 1987) were developed. There are now many more-or-less IEEE 754 conformant products on the market. A fully compliant implementation must provide conforming representations of floating-point values, perform arithmetic operations as specified by the standard, provide four rounding modes and five exception flags defined by the standard, support infinities, NaNs, signed zeros, and unordered comparisons, and provide access to all these features from programming languages (as supported by the compiler and runtime library). Not surprisingly, very few implementations comply fully with the IEEE 754 standard in all respects. But one might imagine that if there were such compliance one could expect bit-for-bit identical results for a given algorithm executed on any conforming implementation. The paper explains why this is not always the case.

entry:
@Article{Ris:1993:WFP,
  author =       "Fred Ris and Ed Barkmeyer and Craig Schaffert and
                 Peter Farkas",
  title =        "When Floating-Point Addition Isn't Commutative",
  journal =      j-SIGNUM,
  volume =       "28",
  number =       "1",
  pages =        "8--13",
  month =        jan,
  year =         "1993",
  CODEN =        "SNEWD6",
  DOI =          "https://doi.org/10.1145/156301.156303",
  ISSN =         "0163-5778 (print), 1558-0237 (electronic)",
  ISSN-L =       "0163-5778",
  bibdate =      "Tue Apr 12 07:50:23 MDT 2005",
  bibsource =    "ftp://garbo.uwasa.fi/pc/doc-soft/fpbibl18.zip;
                 http://portal.acm.org/;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "In the early 1980s, the IEEE floating-point standards
                 (754 for binary formats adopted in 1985 and 854 for
                 more general situations adopted in 1987) were
                 developed. There are now many more-or-less IEEE 754
                 conformant products on the market. A fully compliant
                 implementation must provide conforming representations
                 of floating-point values, perform arithmetic operations
                 as specified by the standard, provide four rounding
                 modes and five exception flags defined by the standard,
                 support infinities, NaNs, signed zeros, and unordered
                 comparisons, and provide access to all these features
                 from programming languages (as supported by the
                 compiler and runtime library). Not surprisingly, very
                 few implementations comply fully with the IEEE 754
                 standard in all respects. But one might imagine that if
                 there were such compliance one could expect bit-for-bit
                 identical results for a given algorithm executed on any
                 conforming implementation. The paper explains why this
                 is not always the case.",
  acknowledgement = ack-nhfb # " and " # ack-nj,
  affiliation =  "IBM Federal Syst. Co., Boulder, CO, USA",
  classification = "C5230 (Digital arithmetic methods)",
  fjournal =     "ACM SIGNUM Newsletter",
  journal-URL =  "http://portal.acm.org/browse_dl.cfm?idx=J690",
  keywords =     "Arithmetic operations; Conforming implementation;
                 Exception flags; Floating-point addition;
                 Floating-point values; IEEE 754; IEEE floating-point
                 standards; Rounding modes",
  thesaurus =    "Digital arithmetic; Standards",
}


bibtype: inproceedings
filename: fparith.bib
label: Samani:1993:SVP
author: D. M. Samani and J. Ellinger and E. J. Powers and E. E. Swartzlander
crossref: IEEE:1993:PMS
pages: 1509--1514 vol.2
year: 1993
bibdate: Thu Dec 14 11:25:18 MST 1995
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1995.12.14 11:25:18 MST
acknowledgement: ack-nhfb
affiliation: Department of Electr. and Comput. Eng., Texas University, Austin, TX, USA
rawauthor: D. M. Samani and J. Ellinger and E. J. Powers and E. E. Swartzlander
title:
Simulation of variable precision IEEE floating point using C++ and its application in digital signal processor design

abstract:
We use a C++ class to transparently emulate variable-precision floating point arithmetic using standard arithmetic. This allows the determination of an algorithm's susceptibility to errors produced by finite-precision arithmetic and the determination of the minimum precision necessary for stability. The class, called Real, offers several advantages for many applications, e.g., ALU design, signal processing, systolic and lattice filter design, etc. Since it supports the IEEE floating point standard, it produces identical results on any compliant platform. An algorithm can be adapted for simulation with minimal effort and without interfering with normal operation. We also consider how the acceptance of the IEEE standard and the development of fast hardware for microcomputers have changed common assumptions about algorithm timing. Finally, we examine the potential use of the new floating point DSP chips for adaptive filtering. Historically, the computational requirements of adaptive filters confined implementations to specialized hardware or supercomputers. Today's DSP chips offer a relatively inexpensive alternative. We have implemented several adaptive filtering algorithms that are based on Least Squares estimation criterion on Motorola's DSP96002. Our experience indicates that the DSP96K is a viable medium for such algorithms and one can expect a ten-fold speed improvement over a i486 running at 50 MHz.

keywords:
Adaptive filtering; Algorithm timing; ALU design; C++ language; Digital signal processor design; DSP chips; Floating point arithmetic; IEEE standard; Lattice filter; Least squares estimation criterion; Motorola DSP96002; Real; Systolic filter; Variable precision IEEE floating point

thesaurus:
Adaptive filters; C language; Digital signal processing chips; Floating point arithmetic; Lattice filters; Least squares approximations; Systolic arrays

rawabstract:
We use a C++ class to transparently emulate variable-precision floating point arithmetic using standard arithmetic. This allows the determination of an algorithm's susceptibility to errors produced by finite-precision arithmetic and the determination of the minimum precision necessary for stability. The class, called Real, offers several advantages for many applications, e.g., ALU design, signal processing, systolic and lattice filter design, etc. Since it supports the IEEE floating point standard, it produces identical results on any compliant platform. An algorithm can be adapted for simulation with minimal effort and without interfering with normal operation. We also consider how the acceptance of the IEEE standard and the development of fast hardware for microcomputers have changed common assumptions about algorithm timing. Finally, we examine the potential use of the new floating point DSP chips for adaptive filtering. Historically, the computational requirements of adaptive filters confined implementations to specialized hardware or supercomputers. Today's DSP chips offer a relatively inexpensive alternative. We have implemented several adaptive filtering algorithms that are based on Least Squares estimation criterion on Motorola's DSP96002. Our experience indicates that the DSP96K is a viable medium for such algorithms and one can expect a ten-fold speed improvement over a i486 running at 50 MHz.

rawtitle:
Simulation of variable precision {IEEE} floating point using {C}++ and its application in digital signal processor design

entry:
@InProceedings{Samani:1993:SVP,
  author =       "D. M. Samani and J. Ellinger and E. J. Powers and E.
                 E. Swartzlander",
  title =        "Simulation of variable precision {IEEE} floating point
                 using {C}++ and its application in digital signal
                 processor design",
  crossref =     "IEEE:1993:PMS",
  pages =        "1509--1514 vol.2",
  year =         "1993",
  bibdate =      "Thu Dec 14 11:25:18 MST 1995",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "We use a C++ class to transparently emulate
                 variable-precision floating point arithmetic using
                 standard arithmetic. This allows the determination of
                 an algorithm's susceptibility to errors produced by
                 finite-precision arithmetic and the determination of
                 the minimum precision necessary for stability. The
                 class, called Real, offers several advantages for many
                 applications, e.g., ALU design, signal processing,
                 systolic and lattice filter design, etc. Since it
                 supports the IEEE floating point standard, it produces
                 identical results on any compliant platform. An
                 algorithm can be adapted for simulation with minimal
                 effort and without interfering with normal operation.
                 We also consider how the acceptance of the IEEE
                 standard and the development of fast hardware for
                 microcomputers have changed common assumptions about
                 algorithm timing. Finally, we examine the potential use
                 of the new floating point DSP chips for adaptive
                 filtering. Historically, the computational requirements
                 of adaptive filters confined implementations to
                 specialized hardware or supercomputers. Today's DSP
                 chips offer a relatively inexpensive alternative. We
                 have implemented several adaptive filtering algorithms
                 that are based on Least Squares estimation criterion on
                 Motorola's DSP96002. Our experience indicates that the
                 DSP96K is a viable medium for such algorithms and one
                 can expect a ten-fold speed improvement over a i486
                 running at 50 MHz.",
  acknowledgement = ack-nhfb,
  affiliation =  "Department of Electr. and Comput. Eng., Texas
                 University, Austin, TX, USA",
  classification = "B1265F (Microprocessors and microcomputers); B1270F
                 (Digital filters); B6140 (Signal processing and
                 detection); C5135 (Digital signal processing chips);
                 C5220P (Parallel architecture); C5230 (Digital
                 arithmetic methods); C5240 (Digital filters); C5260
                 (Digital signal processing); C6140D (High level
                 languages)",
  keywords =     "Adaptive filtering; Algorithm timing; ALU design; C++
                 language; Digital signal processor design; DSP chips;
                 Floating point arithmetic; IEEE standard; Lattice
                 filter; Least squares estimation criterion; Motorola
                 DSP96002; Real; Systolic filter; Variable precision
                 IEEE floating point",
  thesaurus =    "Adaptive filters; C language; Digital signal
                 processing chips; Floating point arithmetic; Lattice
                 filters; Least squares approximations; Systolic
                 arrays",
}


bibtype: inproceedings
filename: fparith.bib
label: Sarma:1993:MAR
author: D. D. Sarma and D. W. Matula
title: Measuring the Accuracy of ROM Reciprocal Tables
crossref: Swartzlander:1993:SCA
pages: 95--102
year: 1993
bibdate: Wed Nov 14 18:47:17 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.14 18:47:17 ???
URL: http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Sarma.pdf
keywords: ARITH-11
acknowledgement: ack-nhfb
rawauthor: D. D. Sarma and D. W. Matula
rawtitle: Measuring the Accuracy of {ROM} Reciprocal Tables
entry:
@InProceedings{Sarma:1993:MAR,
  author =       "D. D. Sarma and D. W. Matula",
  title =        "Measuring the Accuracy of {ROM} Reciprocal Tables",
  crossref =     "Swartzlander:1993:SCA",
  pages =        "95--102",
  year =         "1993",
  bibdate =      "Wed Nov 14 18:47:17 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Sarma.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-11",
}


bibtype: article
filename: fparith.bib
label: Scannell:1993:DMM
author: Robert K. Scannell and John K. Hagge
title: Development of a Multichip Module DSP
journal: j-COMPUTER
volume: 26
number: 4
pages: 13--21
month: apr
monthnumber: 4
year: 1993
CODEN: CPTRB4
ISSN: 0018-9162 (print), 1558-0814 (electronic) OR 00189162 (print), 15580814 (electronic)
ISSNL: 0018-9162 OR 00189162
bibdate: Tue May 14 16:20:44 MDT 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.05.14 16:20:44 MDT
fjournal: Computer
acknowledgement: ack-nhfb
affiliation: Rockwell Int., Anaheim, CA, USA
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=2
thesaurus: Digital signal processing chips; Multichip modules
rawauthor: Robert K. Scannell and John K. Hagge
rawtitle: Development of a Multichip Module {DSP}
abstract:
A highly modular processor architecture based on off-the-shelf components supports an MCM design implementation that delivers 400 million floating-point operations per second in a 75-gram package.

keywords:
Cost; Highly modular processor architecture; Interconnect-substrate design; MCM package assembly; Multichip module DSP; Signal processor packaging design; Size; Weight

rawabstract:
A highly modular processor architecture based on off-the-shelf components supports an MCM design implementation that delivers 400 million floating-point operations per second in a 75-gram package.

entry:
@Article{Scannell:1993:DMM,
  author =       "Robert K. Scannell and John K. Hagge",
  title =        "Development of a Multichip Module {DSP}",
  journal =      j-COMPUTER,
  volume =       "26",
  number =       "4",
  pages =        "13--21",
  month =        apr,
  year =         "1993",
  CODEN =        "CPTRB4",
  ISSN =         "0018-9162 (print), 1558-0814 (electronic)",
  ISSN-L =       "0018-9162",
  bibdate =      "Tue May 14 16:20:44 MDT 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "A highly modular processor architecture based on
                 off-the-shelf components supports an MCM design
                 implementation that delivers 400 million floating-point
                 operations per second in a 75-gram package.",
  acknowledgement = ack-nhfb,
  affiliation =  "Rockwell Int., Anaheim, CA, USA",
  classification = "B0170J (Product packaging); B1265F (Microprocessors
                 and microcomputers); B2220J (Hybrid integrated
                 circuits); B2570 (Semiconductor integrated circuits);
                 C5135 (Digital signal processing chips)",
  fjournal =     "Computer",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=2",
  keywords =     "Cost; Highly modular processor architecture;
                 Interconnect-substrate design; MCM package assembly;
                 Multichip module DSP; Signal processor packaging
                 design; Size; Weight",
  thesaurus =    "Digital signal processing chips; Multichip modules",
}


bibtype: article
filename: fparith.bib
label: Schorn:1993:AAR
author: Peter Schorn
title: An Axiomatic Approach to Robust Geometric Programs
journal: j-J-SYMBOLIC-COMP
volume: 16
number: 2
pages: 155--166 (or 155--165??)
month: aug
monthnumber: 8
year: 1993
CODEN: JSYCEH
ISSN: 0747-7171 (print), 1095-855X (electronic) OR 07477171 (print), 1095855X (electronic)
ISSNL: 0747-7171 OR 07477171
MRclass: 68U07
MRnumber: 94k:68196
bibdate: Sat May 10 15:54:09 MDT 1997
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1997.05.10 15:54:09 MDT
fjournal: Journal of Symbolic Computation
acknowledgement: ack-nhfb
classcodes: C4260 (Computational geometry); C1180 (Optimisation techniques)
corpsource: Inst. fur Theor. Inf., Eidgenossische Tech. Hochschule, Zurich, Switzerland
journalURL: http://www.sciencedirect.com/science/journal/07477171
treatment: T Theoretical or Mathematical
rawauthor: Peter Schorn
rawtitle: An Axiomatic Approach to Robust Geometric Programs
keywords:
axiomatic approach; computational geometry; digital arithmetic; floating point arithmetic; geometric; imprecise primitives; non-trivial; plane sweep algorithm; primitives; programming; robust geometric programs

entry:
@Article{Schorn:1993:AAR,
  author =       "Peter Schorn",
  title =        "An Axiomatic Approach to Robust Geometric Programs",
  journal =      j-J-SYMBOLIC-COMP,
  volume =       "16",
  number =       "2",
  pages =        "155--166 (or 155--165??)",
  month =        aug,
  year =         "1993",
  CODEN =        "JSYCEH",
  ISSN =         "0747-7171 (print), 1095-855X (electronic)",
  ISSN-L =       "0747-7171",
  MRclass =      "68U07",
  MRnumber =     "94k:68196",
  bibdate =      "Sat May 10 15:54:09 MDT 1997",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  classcodes =   "C4260 (Computational geometry); C1180 (Optimisation
                 techniques)",
  corpsource =   "Inst. fur Theor. Inf., Eidgenossische Tech.
                 Hochschule, Zurich, Switzerland",
  fjournal =     "Journal of Symbolic Computation",
  journal-URL =  "http://www.sciencedirect.com/science/journal/07477171",
  keywords =     "axiomatic approach; computational geometry; digital
                 arithmetic; floating point arithmetic; geometric;
                 imprecise primitives; non-trivial; plane sweep
                 algorithm; primitives; programming; robust geometric
                 programs",
  treatment =    "T Theoretical or Mathematical",
}


bibtype: inproceedings
filename: fparith.bib
label: Schulte:1993:ERC
author: M. Schulte and E. Swartzlander
title: Exact rounding of certain elementary functions
crossref: Swartzlander:1993:SCA
pages: 138--145
year: 1993
bibdate: Thu Jun 20 10:16:17 2002
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2002.06.20 10:16:17 ???
acknowledgement: ack-nhfb
affiliation: Department of Electr. and Comput. Eng., Texas University, Austin, TX, USA
thesaurus: Floating point arithmetic; Function evaluation
rawauthor: M. Schulte and E. Swartzlander
rawtitle: Exact rounding of certain elementary functions
URL:
http://mesa.ece.wisc.edu/publications/cp_1993-01.pdf; http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Schulte.pdf

abstract:
An algorithm is described which produces exactly rounded results for the functions of reciprocal, square root, 2/sup x/, and log 2/sup x/. Hardware designs based on this algorithm are presented for floating point numbers with 16- and 24-b significands. These designs use a polynomial approximation in which coefficients are originally selected based on the Chebyshev series approximation and are then adjusted to ensure exactly rounded results for all inputs. To reduce the number of terms in the approximation, the input interval is divided into subintervals of equal size and different coefficients are used for each subinterval. For floating point numbers with 16-b significands, the exactly rounded value of the function can be computed in 51 ns on a 20-mm/sup 2/ chip. For floating point numbers with 24-b significands, the functions can be computed in 80 ns on a 98-mm/sup 2/ chip.

keywords:
ARITH-11; Elementary functions; Exact rounding; Floating point numbers; Polynomial approximation; Reciprocal; Rounded results; Square root

rawabstract:
An algorithm is described which produces exactly rounded results for the functions of reciprocal, square root, 2/sup x/, and log 2/sup x/. Hardware designs based on this algorithm are presented for floating point numbers with 16- and 24-b significands. These designs use a polynomial approximation in which coefficients are originally selected based on the Chebyshev series approximation and are then adjusted to ensure exactly rounded results for all inputs. To reduce the number of terms in the approximation, the input interval is divided into subintervals of equal size and different coefficients are used for each subinterval. For floating point numbers with 16-b significands, the exactly rounded value of the function can be computed in 51 ns on a 20-mm/sup 2/ chip. For floating point numbers with 24-b significands, the functions can be computed in 80 ns on a 98-mm/sup 2/ chip.

entry:
@InProceedings{Schulte:1993:ERC,
  author =       "M. Schulte and E. Swartzlander",
  title =        "Exact rounding of certain elementary functions",
  crossref =     "Swartzlander:1993:SCA",
  pages =        "138--145",
  year =         "1993",
  bibdate =      "Thu Jun 20 10:16:17 2002",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://mesa.ece.wisc.edu/publications/cp_1993-01.pdf;
                 http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Schulte.pdf",
  abstract =     "An algorithm is described which produces exactly
                 rounded results for the functions of reciprocal, square
                 root, 2/sup x/, and log 2/sup x/. Hardware designs
                 based on this algorithm are presented for floating
                 point numbers with 16- and 24-b significands. These
                 designs use a polynomial approximation in which
                 coefficients are originally selected based on the
                 Chebyshev series approximation and are then adjusted to
                 ensure exactly rounded results for all inputs. To
                 reduce the number of terms in the approximation, the
                 input interval is divided into subintervals of equal
                 size and different coefficients are used for each
                 subinterval. For floating point numbers with 16-b
                 significands, the exactly rounded value of the function
                 can be computed in 51 ns on a 20-mm/sup 2/ chip. For
                 floating point numbers with 24-b significands, the
                 functions can be computed in 80 ns on a 98-mm/sup 2/
                 chip.",
  acknowledgement = ack-nhfb,
  affiliation =  "Department of Electr. and Comput. Eng., Texas
                 University, Austin, TX, USA",
  classification = "C4120 (Functional analysis); C5230 (Digital
                 arithmetic methods)",
  confdate =     "29 June--2 July 1993",
  conflocation = "Windsor, Ont., Canada",
  confsponsor =  "IEEE Comput. Soc.; IEEE Tech. Committee on VLSI;
                 Natural Sci. and Eng. Res.; Council of Canada",
  keywords =     "ARITH-11; Elementary functions; Exact rounding;
                 Floating point numbers; Polynomial approximation;
                 Reciprocal; Rounded results; Square root",
  thesaurus =    "Floating point arithmetic; Function evaluation",
}


bibtype: inproceedings
filename: fparith.bib
label: Schulte:1993:PHD
author: M. J. Schulte and E. E. Swartzlander, Jr.
title: Parallel Hardware Designs for Correctly Rounded Elementary Functions
crossref: Corliss:1993:AIC
pages: 65--87 (or 65--88??)
year: 1993
bibdate: Tue Oct 22 13:37:58 2002
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2002.10.22 13:37:58 ???
acknowledgement: ack-nhfb
rawauthor: M. J. Schulte and E. E. {Swartzlander, Jr.}
rawtitle: Parallel Hardware Designs for Correctly Rounded Elementary Functions
entry:
@InProceedings{Schulte:1993:PHD,
  author =       "M. J. Schulte and E. E. {Swartzlander, Jr.}",
  title =        "Parallel Hardware Designs for Correctly Rounded
                 Elementary Functions",
  crossref =     "Corliss:1993:AIC",
  pages =        "65--87 (or 65--88??)",
  year =         "1993",
  bibdate =      "Tue Oct 22 13:37:58 2002",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
}


bibtype: inproceedings
filename: fparith.bib
label: Schulte:1993:TMC
author: M. J. Schulte and E. E. Swartzlander, Jr.
title: Truncated Multiplication with Correction Constant
crossref: Eggermont:1993:VSP
pages: 388--396
year: 1993
bibdate: Sun Mar 04 10:38:15 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.03.04 10:38:15 ???
URL: http://mesa.ece.wisc.edu/publications/cp_1993-02.pdf
acknowledgement: ack-nhfb
rawauthor: M. J. Schulte and E. E. {Swartzlander, Jr.}
rawtitle: Truncated Multiplication with Correction Constant
entry:
@InProceedings{Schulte:1993:TMC,
  author =       "M. J. Schulte and E. E. {Swartzlander, Jr.}",
  title =        "Truncated Multiplication with Correction Constant",
  crossref =     "Eggermont:1993:VSP",
  pages =        "388--396",
  year =         "1993",
  bibdate =      "Sun Mar 04 10:38:15 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://mesa.ece.wisc.edu/publications/cp_1993-02.pdf",
  acknowledgement = ack-nhfb,
}


bibtype: techreport
filename: fparith.bib
label: Schwarz:1993:HRAa
author: E. Schwarz
title: High-radix algorithms for high-order arithmetic operations
type: Technical Report
number: CSL-TR-93-559
institution: Computer Systems Laboratory, Stanford University
address: Stanford, CA, USA
pages: 388--396
month: jan
monthnumber: 1
year: 1993
bibdate: Thu Apr 2 08:38:35 1998
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1998.04.02 08:38:35 ???
acknowledgement: ack-sfo
rawauthor: E. Schwarz
rawtitle: High-radix algorithms for high-order arithmetic operations
entry:
@TechReport{Schwarz:1993:HRAa,
  author =       "E. Schwarz",
  title =        "High-radix algorithms for high-order arithmetic
                 operations",
  type =         "Technical Report",
  number =       "CSL-TR-93-559",
  institution =  "Computer Systems Laboratory, Stanford University",
  address =      "Stanford, CA, USA",
  month =        jan,
  year =         "1993",
  bibdate =      "Thu Apr 2 08:38:35 1998",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-sfo # " and " # ack-nhfb,
}


bibtype: phdthesis
filename: fparith.bib
label: Schwarz:1993:HRAb
author: Eric Mark Schwarz
title: High-radix algorithms for high-order arithmetic operations
type: Thesis (Ph.D.)
school: Department of Electrical Engineering, Stanford University
address: Stanford, CA, USA
pages: 224
month: apr
monthnumber: 4
year: 1993
bibdate: Mon Jan 07 22:38:06 2008
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2008.01.07 22:38:06 ???
remark: AAT 9317816. ProQuest document ID 746798521.
acknowledgement: ack-nhfb
rawauthor: Eric Mark Schwarz
rawtitle: High-radix algorithms for high-order arithmetic operations
abstract:
Many common algorithms for high-order arithmetic operations require an initial approximation. The Newton--Raphson algorithm starts with an approximation and then quadratically converges on the solution. The initial approximation determines the number of iterations of the algorithm and is typically implemented as a look-up table in the form of a ROM or PLA. A novel method is suggested which describes high-order arithmetic operations with a partial product array. This method applies to the operations of division, reciprocal, square root, natural logarithm, exponential, and trigonometric functions. The partial product array of Boolean elements which describes the operation can be summed on an existing floating-point multiplier. The hardware needed is only the logic gates to create the Boolean elements in the array and a multiplexor, and the latency is that of the multiplier. Thus, by reusing a floating-point multiplier, a high-precision approximation to a high-order arithmetic operation can be implemented with a low marginal cost.par This dissertation describes the implementation and shows a method for deriving partial product arrays to approximate arithmetic operations. Then the proposed method is applied and evaluated for several operations. The proposed method yields a minimum approximation of twelve bits correct for the reciprocal operation and sixteen bits for the square root operation. The proposed method is shown to be as small as 0.05% the size (in gates) of an equivalent precision look-up table and has up to four times the accuracy (in bits) as an equivalent latency polynomial approximation. Also, three new iterative algorithms to increase the precision of the approximations and a theoretical analysis of the partial product array representation are detailed. Thus, high-radix algorithms of many arithmetic operations are possible at low cost.

keywords:
division; elementary functions; exponential; logarithm; PPA (partial product array); reciprocal square root; square root

rawabstract:
Many common algorithms for high-order arithmetic operations require an initial approximation. The Newton--Raphson algorithm starts with an approximation and then quadratically converges on the solution. The initial approximation determines the number of iterations of the algorithm and is typically implemented as a look-up table in the form of a ROM or PLA. A novel method is suggested which describes high-order arithmetic operations with a partial product array. This method applies to the operations of division, reciprocal, square root, natural logarithm, exponential, and trigonometric functions. The partial product array of Boolean elements which describes the operation can be summed on an existing floating-point multiplier. The hardware needed is only the logic gates to create the Boolean elements in the array and a multiplexor, and the latency is that of the multiplier. Thus, by reusing a floating-point multiplier, a high-precision approximation to a high-order arithmetic operation can be implemented with a low marginal cost.\par This dissertation describes the implementation and shows a method for deriving partial product arrays to approximate arithmetic operations. Then the proposed method is applied and evaluated for several operations. The proposed method yields a minimum approximation of twelve bits correct for the reciprocal operation and sixteen bits for the square root operation. The proposed method is shown to be as small as 0.05\% the size (in gates) of an equivalent precision look-up table and has up to four times the accuracy (in bits) as an equivalent latency polynomial approximation. Also, three new iterative algorithms to increase the precision of the approximations and a theoretical analysis of the partial product array representation are detailed. Thus, high-radix algorithms of many arithmetic operations are possible at low cost.

entry:
@PhdThesis{Schwarz:1993:HRAb,
  author =       "Eric Mark Schwarz",
  title =        "High-radix algorithms for high-order arithmetic
                 operations",
  type =         "Thesis ({Ph.D.})",
  school =       "Department of Electrical Engineering, Stanford
                 University",
  address =      "Stanford, CA, USA",
  pages =        "224",
  month =        apr,
  year =         "1993",
  bibdate =      "Mon Jan 07 22:38:06 2008",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "Many common algorithms for high-order arithmetic
                 operations require an initial approximation. The
                 Newton--Raphson algorithm starts with an approximation
                 and then quadratically converges on the solution. The
                 initial approximation determines the number of
                 iterations of the algorithm and is typically
                 implemented as a look-up table in the form of a ROM or
                 PLA. A novel method is suggested which describes
                 high-order arithmetic operations with a partial product
                 array. This method applies to the operations of
                 division, reciprocal, square root, natural logarithm,
                 exponential, and trigonometric functions. The partial
                 product array of Boolean elements which describes the
                 operation can be summed on an existing floating-point
                 multiplier. The hardware needed is only the logic gates
                 to create the Boolean elements in the array and a
                 multiplexor, and the latency is that of the multiplier.
                 Thus, by reusing a floating-point multiplier, a
                 high-precision approximation to a high-order arithmetic
                 operation can be implemented with a low marginal
                 cost.\par

                 This dissertation describes the implementation and
                 shows a method for deriving partial product arrays to
                 approximate arithmetic operations. Then the proposed
                 method is applied and evaluated for several operations.
                 The proposed method yields a minimum approximation of
                 twelve bits correct for the reciprocal operation and
                 sixteen bits for the square root operation. The
                 proposed method is shown to be as small as 0.05\% the
                 size (in gates) of an equivalent precision look-up
                 table and has up to four times the accuracy (in bits)
                 as an equivalent latency polynomial approximation.
                 Also, three new iterative algorithms to increase the
                 precision of the approximations and a theoretical
                 analysis of the partial product array representation
                 are detailed. Thus, high-radix algorithms of many
                 arithmetic operations are possible at low cost.",
  acknowledgement = ack-nhfb,
  keywords =     "division; elementary functions; exponential;
                 logarithm; PPA (partial product array); reciprocal
                 square root; square root",
  remark =       "AAT 9317816. ProQuest document ID 746798521.",
}


bibtype: inproceedings
filename: fparith.bib
label: Schwarz:1993:HSA
author: Eric M. Schwarz and Michael J. Flynn
title: Hardware starting approximation for the square root operation
crossref: Swartzlander:1993:SCA
pages: 103--111
year: 1993
bibdate: Sat Jul 16 15:28:14 MDT 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.07.16 15:28:14 MDT
URL: http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Schwarz.pdf
keywords: ARITH-11
acknowledgement: ack-sfo
rawauthor: Eric M. Schwarz and Michael J. Flynn
rawtitle: Hardware starting approximation for the square root operation
entry:
@InProceedings{Schwarz:1993:HSA,
  author =       "Eric M. Schwarz and Michael J. Flynn",
  title =        "Hardware starting approximation for the square root
                 operation",
  crossref =     "Swartzlander:1993:SCA",
  pages =        "103--111",
  year =         "1993",
  bibdate =      "Sat Jul 16 15:28:14 MDT 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Schwarz.pdf",
  acknowledgement = ack-sfo # " and " # ack-nhfb,
  keywords =     "ARITH-11",
  summary =      "A method for obtaining high-precision approximations
                 of high-order arithmetic operations is presented. These
                 approximations provide an accurate starting
                 approximation for high-precision iterative algorithms,
                 which translates into few iterations and \ldots{}",
}


bibtype: article
filename: fparith.bib
label: Schwarz:1993:PHR
author: E. M. Schwarz and M. J. Flynn
title: Parallel high-radix nonrestoring division
journal: j-IEEE-TRANS-COMPUT
volume: 42
number: 10
pages: 1234--1246
month: oct
monthnumber: 10
year: 1993
CODEN: ITCOB4
DOI: https://doi.org/10.1109/12.257709
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Thu Jul 7 07:58:51 MDT 2011
bibtimestamp: 2011.07.07 07:58:51 MDT
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=257709
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: E. M. Schwarz and M. J. Flynn
rawtitle: Parallel high-radix nonrestoring division
entry:
@Article{Schwarz:1993:PHR,
  author =       "E. M. Schwarz and M. J. Flynn",
  title =        "Parallel high-radix nonrestoring division",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "42",
  number =       "10",
  pages =        "1234--1246",
  month =        oct,
  year =         "1993",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/12.257709",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Thu Jul 7 07:58:51 MDT 2011",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput1990.bib",
  URL =          "http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=257709",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
}


bibtype: techreport
filename: fparith.bib
label: Schwarz:1993:UFM
author: Eric Mark Schwarz and M. J. (Michael J.) Flynn
title: Using a floating-point multiplier's internals for high-radix division and square root
type: Technical report
number: CSL-TR-93-554
institution: Computer Systems Laboratory, Stanford University
address: Stanford, CA, USA
pages: iv + 45
year: 1993
bibdate: Sat Feb 24 15:01:45 MST 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.02.24 15:01:45 MST
keywords: Computer arithmetic.
acknowledgement: ack-nhfb
rawauthor: Eric Mark Schwarz and M. J. (Michael J.) Flynn
rawtitle: Using a floating-point multiplier's internals for high-radix division and square root
remark:
``January 1993.'' Abstract: ``A method for obtaining high-precision approximations of high-order arithmetic operations at low-cost is presented in this study. Specifically, high-precision approximations of the reciprocal (12 bits worst case) and square root (16 bits) operations are obtained using the internal hardware of a floating-point multiplier without the use of look-up tables. The additional combinatorial logic necessary is very small due to the reuse of existing hardware. These low-cost high-precision approximations are used by iterative algorithms to perform the operations of division and square root. The method presented also applies to several other high-order arithmetic operations. Thus, high-radix algorithms for high-order arithmetic operations such as division and square root are possible at low-cost.''

entry:
@TechReport{Schwarz:1993:UFM,
  author =       "Eric Mark Schwarz and M. J. (Michael J.) Flynn",
  title =        "Using a floating-point multiplier's internals for
                 high-radix division and square root",
  type =         "Technical report",
  number =       "CSL-TR-93-554",
  institution =  "Computer Systems Laboratory, Stanford University",
  address =      "Stanford, CA, USA",
  pages =        "iv + 45",
  year =         "1993",
  bibdate =      "Sat Feb 24 15:01:45 MST 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "Computer arithmetic.",
  remark =       "``January 1993.'' Abstract: ``A method for obtaining
                 high-precision approximations of high-order arithmetic
                 operations at low-cost is presented in this study.
                 Specifically, high-precision approximations of the
                 reciprocal (12 bits worst case) and square root (16
                 bits) operations are obtained using the internal
                 hardware of a floating-point multiplier without the use
                 of look-up tables. The additional combinatorial logic
                 necessary is very small due to the reuse of existing
                 hardware. These low-cost high-precision approximations
                 are used by iterative algorithms to perform the
                 operations of division and square root. The method
                 presented also applies to several other high-order
                 arithmetic operations. Thus, high-radix algorithms for
                 high-order arithmetic operations such as division and
                 square root are possible at low-cost.''",
}


bibtype: inproceedings
filename: fparith.bib
label: Shanbhag:1993:REAa
author: N. R. Shanbhag and K. K. Parhi
booktitle: IEEE International Symposium on Circuits and Systems: ISCAS '93, 3--6 May 1993
title: Roundoff error analysis of the pipelined ADPCM coder
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 886--889
year: 1993
bibdate: Sat Jul 16 11:25:07 MDT 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.07.16 11:25:07 MDT
acknowledgement: ack-nhfb
rawauthor: N. R. Shanbhag and K. K. Parhi
rawbooktitle: {IEEE} International Symposium on Circuits and Systems: {ISCAS '93}, 3--6 May 1993
rawtitle: Roundoff error analysis of the pipelined {ADPCM} coder
entry:
@InProceedings{Shanbhag:1993:REAa,
  author =       "N. R. Shanbhag and K. K. Parhi",
  booktitle =    "{IEEE} International Symposium on Circuits and
                 Systems: {ISCAS '93}, 3--6 May 1993",
  title =        "Roundoff error analysis of the pipelined {ADPCM}
                 coder",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "886--889",
  year =         "1993",
  CODEN =        "????",
  ISSN =         "????",
  bibdate =      "Sat Jul 16 11:25:07 MDT 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  summary =      "Not \ldots{}",
}


bibtype: inproceedings
filename: fparith.bib
label: Shanbhag:1993:REAb
author: N. R. Shanbhag and K. K. Parhi
booktitle: IEEE International Symposium on Circuits and Systems: ISCAS '93, 3--6 May 1993
title: Roundoff error analysis of the pipelined ADPCM coder
volume: 1
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 886--889
year: 1993
bibdate: Sat Jul 16 11:25:07 MDT 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.07.16 11:25:07 MDT
acknowledgement: ack-nhfb
rawauthor: N. R. Shanbhag and K. K. Parhi
rawbooktitle: {IEEE} International Symposium on Circuits and Systems: {ISCAS '93}, 3--6 May 1993
rawtitle: Roundoff error analysis of the pipelined {ADPCM} coder
entry:
@InProceedings{Shanbhag:1993:REAb,
  author =       "N. R. Shanbhag and K. K. Parhi",
  booktitle =    "{IEEE} International Symposium on Circuits and
                 Systems: {ISCAS '93}, 3--6 May 1993",
  title =        "Roundoff error analysis of the pipelined {ADPCM}
                 coder",
  volume =       "1",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "886--889",
  year =         "1993",
  CODEN =        "????",
  ISSN =         "????",
  bibdate =      "Sat Jul 16 11:25:07 MDT 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  summary =      "Roundoff error analysis of a pipelined adaptive
                 differential pulse code modulation (ADPCM) coder is
                 presented. The pipelined coder has been developed by
                 employing the relaxed look-ahead technique. It is shown
                 that the precision of the quantized \ldots{}",
}


bibtype: inproceedings
filename: fparith.bib
label: Shand:1993:FIR
author: M. Shand and J. Vuillemin
title: Fast Implementations of RSA Cryptography
crossref: Swartzlander:1993:SCA
pages: 252--259
year: 1993
bibdate: Wed Nov 14 18:47:51 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.14 18:47:51 ???
URL: http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Shand.pdf
keywords: ARITH-11
acknowledgement: ack-nhfb
rawauthor: M. Shand and J. Vuillemin
rawtitle: Fast Implementations of {RSA} Cryptography
entry:
@InProceedings{Shand:1993:FIR,
  author =       "M. Shand and J. Vuillemin",
  title =        "Fast Implementations of {RSA} Cryptography",
  crossref =     "Swartzlander:1993:SCA",
  pages =        "252--259",
  year =         "1993",
  bibdate =      "Wed Nov 14 18:47:51 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Shand.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-11",
}


bibtype: book
filename: fparith.bib
label: Shannon:1993:CES
author: Claude Elwood Shannon and N. J. A. (Neil James Alexander) Sloane and A. D. (Aaron D.) Wyner
title: Claude Elwood Shannon: collected papers
publisher: pub-IEEE
address: pub-IEEE:adr
pages: xliv + 924
year: 1993
ISBN: 0-7803-0434-9 OR 0780304349
ISBN13: 978-0-7803-0434-5 OR 9780780304345
LCCN: TK5101 .S448 1993
bibdate: Sat Nov 20 09:04:51 MST 2010
bibsource: catalog.princeton.edu:7090/voyager; https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2010.11.20 09:04:51 MST
subject: telecommunication; information theory; computers
acknowledgement: ack-nhfb
authordates: Claude Elwood Shannon (1916--2001)
rawauthor: Claude Elwood Shannon and N. J. A. (Neil James Alexander) Sloane and A. D. (Aaron D.) Wyner
rawtitle: {Claude Elwood Shannon}: collected papers
entry:
@Book{Shannon:1993:CES,
  author =       "Claude Elwood Shannon and N. J. A. (Neil James
                 Alexander) Sloane and A. D. (Aaron D.) Wyner",
  title =        "{Claude Elwood Shannon}: collected papers",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "xliv + 924",
  year =         "1993",
  ISBN =         "0-7803-0434-9",
  ISBN-13 =      "978-0-7803-0434-5",
  LCCN =         "TK5101 .S448 1993",
  bibdate =      "Sat Nov 20 09:04:51 MST 2010",
  bibsource =    "catalog.princeton.edu:7090/voyager;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  author-dates = "Claude Elwood Shannon (1916--2001)",
  subject =      "telecommunication; information theory; computers",
}


bibtype: article
filename: fparith.bib
label: Sharp:1993:PRN
author: W. E. Sharp and Carter Bays
title: A portable random number generator for single-precision floating-point arithmetic
journal: j-COMP-GEOSCI
volume: 19
number: 4
pages: 593--??
month: apr
monthnumber: 4
year: 1993
CODEN: CGEODT, CGOSDN
ISSN: 0098-3004 (print), 1873-7803 (electronic) OR 00983004 (print), 18737803 (electronic)
ISSNL: 0098-3004 OR 00983004
bibdate: Sat Feb 24 15:01:45 MST 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.02.24 15:01:45 MST
fjournal: Computers and Geosciences
acknowledgement: ack-nhfb
rawauthor: W. E. Sharp and Carter Bays
rawtitle: A portable random number generator for single-precision floating-point arithmetic
entry:
@Article{Sharp:1993:PRN,
  author =       "W. E. Sharp and Carter Bays",
  title =        "A portable random number generator for
                 single-precision floating-point arithmetic",
  journal =      j-COMP-GEOSCI,
  volume =       "19",
  number =       "4",
  pages =        "593--??",
  month =        apr,
  year =         "1993",
  CODEN =        "CGEODT, CGOSDN",
  ISSN =         "0098-3004 (print), 1873-7803 (electronic)",
  ISSN-L =       "0098-3004",
  bibdate =      "Sat Feb 24 15:01:45 MST 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "Computers and Geosciences",
}


bibtype: inproceedings
filename: fparith.bib
label: Shirayanagi:1993:MCM
author: Kiyoshi Shirayanagi
title: An algorithm to compute floating point Grobner bases
crossref: Lee:1993:MCM
pages: 95--106
year: 1993
MRclass: 68Q40 (13P10 68Q25)
MRnumber: 94j:68129
bibdate: Fri Dec 8 08:24:13 1995
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1995.12.08 08:24:13 ???
acknowledgement: ack-nhfb
rawauthor: Kiyoshi Shirayanagi
rawtitle: An algorithm to compute floating point {Gr{\"o}bner} bases
entry:
@InProceedings{Shirayanagi:1993:MCM,
  author =       "Kiyoshi Shirayanagi",
  title =        "An algorithm to compute floating point {Gr{\"o}bner}
                 bases",
  crossref =     "Lee:1993:MCM",
  pages =        "95--106",
  year =         "1993",
  MRclass =      "68Q40 (13P10 68Q25)",
  MRnumber =     "94j:68129",
  bibdate =      "Fri Dec 8 08:24:13 1995",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
}


bibtype: article
filename: fparith.bib
label: Shute:1993:AAB
author: Malcolm J. Shute
title: Abotec: an automatic back-of-the-envelope calculator
journal: j-SIGPLAN
volume: 28
number: 8
pages: 90--98
month: aug
monthnumber: 8
year: 1993
CODEN: SINODQ
ISSN: 0362-1340 (print), 1523-2867 (print), 1558-1160 OR 03621340 (print), 15232867 (print), 15581160
ISSNL: 0362-1340 OR 03621340
bibdate: Sun Dec 14 09:16:40 MST 2003
bibsource: http://portal.acm.org/; https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2003.12.14 09:16:40 MST
fjournal: ACM SIGPLAN Notices
acknowledgement: ack-nhfb
affiliation: Department of Computer Science, Manchester University, UK
journalURL: http://portal.acm.org/browse_dl.cfm?idx=J706
thesaurus: CAD; High level languages; Mathematics computing
rawauthor: Malcolm J. Shute
rawtitle: {Abotec}: an automatic back-of-the-envelope calculator
abstract:
The trial-and-error method, iteratively applied, is invariably involved in any kind of design work, with much back-of-the-envelope calculation to guide the process. In this, the `what-if' game is a very useful tactic in the search for unexpected solutions in complex design spaces, made all the more effective by the availability of automated interpreters. These are needed to perform the tedious re-calculation of the model each time a change is made to a small part. In the financial world, the interpreter generally takes the form of the spread-sheet, of which Quattro is a fine example; in mathematics it takes the form of packages such as Mathematica. Neither of these is ideally tailored for engineering design, and so Abotec was developed when the author had need of such a tool. There are four main characteristics which fit Abotec for its purpose: it works with floating-point numbers throughout; it uses a richer than normal set of arithmetic operators and functions; it uses mnemonic labelling throughout; and, most importantly it treats all variables as having an upper and lower bound.

keywords:
Abotec; Arithmetic operators; Automated interpreters; Automatic back-of-the-envelope calculator; Back-of-the-envelope calculation; Complex design spaces; Design work; Engineering design; Floating-point numbers; Mnemonic labelling; Re-calculation; Trial-and-error method; Unexpected solutions; What-if

rawabstract:
The trial-and-error method, iteratively applied, is invariably involved in any kind of design work, with much back-of-the-envelope calculation to guide the process. In this, the `what-if' game is a very useful tactic in the search for unexpected solutions in complex design spaces, made all the more effective by the availability of automated interpreters. These are needed to perform the tedious re-calculation of the model each time a change is made to a small part. In the financial world, the interpreter generally takes the form of the spread-sheet, of which Quattro is a fine example; in mathematics it takes the form of packages such as Mathematica. Neither of these is ideally tailored for engineering design, and so Abotec was developed when the author had need of such a tool. There are four main characteristics which fit Abotec for its purpose: it works with floating-point numbers throughout; it uses a richer than normal set of arithmetic operators and functions; it uses mnemonic labelling throughout; and, most importantly it treats all variables as having an upper and lower bound.

entry:
@Article{Shute:1993:AAB,
  author =       "Malcolm J. Shute",
  title =        "{Abotec}: an automatic back-of-the-envelope
                 calculator",
  journal =      j-SIGPLAN,
  volume =       "28",
  number =       "8",
  pages =        "90--98",
  month =        aug,
  year =         "1993",
  CODEN =        "SINODQ",
  ISSN =         "0362-1340 (print), 1523-2867 (print), 1558-1160
                 (electronic)",
  ISSN-L =       "0362-1340",
  bibdate =      "Sun Dec 14 09:16:40 MST 2003",
  bibsource =    "http://portal.acm.org/;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "The trial-and-error method, iteratively applied, is
                 invariably involved in any kind of design work, with
                 much back-of-the-envelope calculation to guide the
                 process. In this, the `what-if' game is a very useful
                 tactic in the search for unexpected solutions in
                 complex design spaces, made all the more effective by
                 the availability of automated interpreters. These are
                 needed to perform the tedious re-calculation of the
                 model each time a change is made to a small part. In
                 the financial world, the interpreter generally takes
                 the form of the spread-sheet, of which Quattro is a
                 fine example; in mathematics it takes the form of
                 packages such as Mathematica. Neither of these is
                 ideally tailored for engineering design, and so Abotec
                 was developed when the author had need of such a tool.
                 There are four main characteristics which fit Abotec
                 for its purpose: it works with floating-point numbers
                 throughout; it uses a richer than normal set of
                 arithmetic operators and functions; it uses mnemonic
                 labelling throughout; and, most importantly it treats
                 all variables as having an upper and lower bound.",
  acknowledgement = ack-nhfb,
  affiliation =  "Department of Computer Science, Manchester University,
                 UK",
  classification = "C6140D (High level languages); C7310 (Mathematics);
                 C7400 (Engineering)",
  fjournal =     "ACM SIGPLAN Notices",
  journal-URL =  "http://portal.acm.org/browse_dl.cfm?idx=J706",
  keywords =     "Abotec; Arithmetic operators; Automated interpreters;
                 Automatic back-of-the-envelope calculator;
                 Back-of-the-envelope calculation; Complex design
                 spaces; Design work; Engineering design; Floating-point
                 numbers; Mnemonic labelling; Re-calculation;
                 Trial-and-error method; Unexpected solutions; What-if",
  thesaurus =    "CAD; High level languages; Mathematics computing",
}


bibtype: article
filename: fparith.bib
label: Smith:1993:PFC
author: Ross Smith and Gerald Sobelman and George Luk and Koichi Suda and Jeff Bracken
title: A Programmable Floating-Point Cell for Systolic Signal Processing
journal: j-J-VLSI-SIGNAL-PROC
volume: 5
number: 1
pages: 75--84
month: jan
monthnumber: 1
year: 1993
CODEN: JVSPED
DOI: https://doi.org/10.1007/BF01880273
ISSN: 0922-5773 (print), 1573-109x (electronic) OR 09225773 (print), 1573109x (electronic)
ISSNL: 0922-5773 OR 09225773
bibdate: Sat Feb 24 15:01:45 MST 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.02.24 15:01:45 MST
fjournal: Journal of VLSI Signal Processing
acknowledgement: ack-nhfb
rawauthor: Ross Smith and Gerald Sobelman and George Luk and Koichi Suda and Jeff Bracken
rawtitle: A Programmable Floating-Point Cell for Systolic Signal Processing
abstract:
The FPC controller and the AMD Am29325 32-bit floating-point mathematics processor form a two-chip cell designed for one- or two-dimensional systolic arrays which can be used to implement a wide variety of signal processing applications. The FPC controls the Am29325, routes data to and from it, and routes data and control to other cells in the array. Unique architectural features include two interchangeable data memories, an input port which can be used as either a local or global port, and a 32-bit instruction word that allows concurrent use of all cell resources. Additional features include a program memory, two data streams, and three control streams.

rawabstract:
The FPC controller and the AMD Am29325 32-bit floating-point mathematics processor form a two-chip cell designed for one- or two-dimensional systolic arrays which can be used to implement a wide variety of signal processing applications. The FPC controls the Am29325, routes data to and from it, and routes data and control to other cells in the array. Unique architectural features include two interchangeable data memories, an input port which can be used as either a local or global port, and a 32-bit instruction word that allows concurrent use of all cell resources. Additional features include a program memory, two data streams, and three control streams.

entry:
@Article{Smith:1993:PFC,
  author =       "Ross Smith and Gerald Sobelman and George Luk and
                 Koichi Suda and Jeff Bracken",
  title =        "A Programmable Floating-Point Cell for Systolic Signal
                 Processing",
  journal =      j-J-VLSI-SIGNAL-PROC,
  volume =       "5",
  number =       "1",
  pages =        "75--84",
  month =        jan,
  year =         "1993",
  CODEN =        "JVSPED",
  DOI =          "https://doi.org/10.1007/BF01880273",
  ISSN =         "0922-5773 (print), 1573-109x (electronic)",
  ISSN-L =       "0922-5773",
  bibdate =      "Sat Feb 24 15:01:45 MST 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "The FPC controller and the AMD Am29325 32-bit
                 floating-point mathematics processor form a two-chip
                 cell designed for one- or two-dimensional systolic
                 arrays which can be used to implement a wide variety of
                 signal processing applications. The FPC controls the
                 Am29325, routes data to and from it, and routes data
                 and control to other cells in the array. Unique
                 architectural features include two interchangeable data
                 memories, an input port which can be used as either a
                 local or global port, and a 32-bit instruction word
                 that allows concurrent use of all cell resources.
                 Additional features include a program memory, two data
                 streams, and three control streams.",
  acknowledgement = ack-nhfb,
  fjournal =     "Journal of VLSI Signal Processing",
}


bibtype: article
filename: fparith.bib
label: Smith:1993:VFP
author: William Smith
title: Varying Floating-Point Precision
journal: j-CUJ
volume: 11
number: 7
pages: 87--??
month: jul
monthnumber: 7
year: 1993
ISSN: 0898-9788 OR 08989788
bibdate: Fri Aug 30 16:52:23 MDT 1996
bibsource: http://www.cuj.com/cbklist.htm; https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.08.30 16:52:23 MDT
fjournal: C Users Journal
acknowledgement: ack-nhfb
rawauthor: William Smith
rawtitle: Varying Floating-Point Precision
entry:
@Article{Smith:1993:VFP,
  author =       "William Smith",
  title =        "Varying Floating-Point Precision",
  journal =      j-CUJ,
  volume =       "11",
  number =       "7",
  pages =        "87--??",
  month =        jul,
  year =         "1993",
  ISSN =         "0898-9788",
  bibdate =      "Fri Aug 30 16:52:23 MDT 1996",
  bibsource =    "http://www.cuj.com/cbklist.htm;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "C Users Journal",
}


bibtype: article
filename: fparith.bib
label: Smith:1993:WDF
author: William Smith
title: Windows, DLLs, and Floating Point Types
journal: j-CUJ
volume: 11
number: 9
pages: 21--??
month: sep
monthnumber: 9
year: 1993
ISSN: 0898-9788 OR 08989788
bibdate: Fri Aug 30 16:52:23 MDT 1996
bibsource: http://www.cuj.com/cbklist.htm; https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.08.30 16:52:23 MDT
fjournal: C Users Journal
acknowledgement: ack-nhfb
rawauthor: William Smith
rawtitle: Windows, {DLLs}, and Floating Point Types
entry:
@Article{Smith:1993:WDF,
  author =       "William Smith",
  title =        "Windows, {DLLs}, and Floating Point Types",
  journal =      j-CUJ,
  volume =       "11",
  number =       "9",
  pages =        "21--??",
  month =        sep,
  year =         "1993",
  ISSN =         "0898-9788",
  bibdate =      "Fri Aug 30 16:52:23 MDT 1996",
  bibsource =    "http://www.cuj.com/cbklist.htm;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "C Users Journal",
}


bibtype: inproceedings
filename: fparith.bib
label: Soulas:1993:AMC
author: T. Soulas and D. Villeger and V. G. Oklobdzija
title: An ASIC macro cell multiplier for complex numbers
crossref: IEEE:1993:PEC
pages: 589--593
year: 1993
bibdate: Thu Dec 14 11:25:18 MST 1995
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1995.12.14 11:25:18 MST
acknowledgement: ack-nhfb
affiliation: Ecole Superieure d'Ingenieurs en Electrotech. et Electron., Noisy le Grand, France
rawauthor: T. Soulas and D. Villeger and V. G. Oklobdzija
rawtitle: An {ASIC} macro cell multiplier for complex numbers
abstract:
An architecture for ASIC macro cell implementing a complex number multiplier with applications in a digital signal processing ASIC chip is described. The complex numbers are packed into one 32-bit word. The design is unique and combines shared Booth encoding for the real and imaginary parts including only one combined modified Wallace tree. The regular Wallace tree and the tree of 4:2 adders for the complex multiplier implementation are compared. The authors took advantage of 4:2 adders in implementing the combined bit compression tree for each part. This design resulted in a more compact wiring structure and balanced delays resulting in faster multiplier circuit. The number of adders was also decreased.

keywords:
32 Bit; ASIC macro cell multiplier; Balanced delays; CMOS; Combined bit compression tree; Compact wiring structure; Complex numbers; Digital signal processing ASIC chip; Floating point number representation; Shared Booth encoding; Wallace tree

thesaurus:
Application specific integrated circuits; Cellular arrays; CMOS logic circuits; Digital signal processing chips; Floating point arithmetic; Integrated circuit design; Logic arrays; Logic CAD; Multiplying circuits

rawabstract:
An architecture for ASIC macro cell implementing a complex number multiplier with applications in a digital signal processing ASIC chip is described. The complex numbers are packed into one 32-bit word. The design is unique and combines shared Booth encoding for the real and imaginary parts including only one combined modified Wallace tree. The regular Wallace tree and the tree of 4:2 adders for the complex multiplier implementation are compared. The authors took advantage of 4:2 adders in implementing the combined bit compression tree for each part. This design resulted in a more compact wiring structure and balanced delays resulting in faster multiplier circuit. The number of adders was also decreased.

entry:
@InProceedings{Soulas:1993:AMC,
  author =       "T. Soulas and D. Villeger and V. G. Oklobdzija",
  title =        "An {ASIC} macro cell multiplier for complex numbers",
  crossref =     "IEEE:1993:PEC",
  pages =        "589--593",
  year =         "1993",
  bibdate =      "Thu Dec 14 11:25:18 MST 1995",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "An architecture for ASIC macro cell implementing a
                 complex number multiplier with applications in a
                 digital signal processing ASIC chip is described. The
                 complex numbers are packed into one 32-bit word. The
                 design is unique and combines shared Booth encoding for
                 the real and imaginary parts including only one
                 combined modified Wallace tree. The regular Wallace
                 tree and the tree of 4:2 adders for the complex
                 multiplier implementation are compared. The authors
                 took advantage of 4:2 adders in implementing the
                 combined bit compression tree for each part. This
                 design resulted in a more compact wiring structure and
                 balanced delays resulting in faster multiplier circuit.
                 The number of adders was also decreased.",
  acknowledgement = ack-nhfb,
  affiliation =  "Ecole Superieure d'Ingenieurs en Electrotech. et
                 Electron., Noisy le Grand, France",
  classification = "B1130B (Computer-aided circuit analysis and design);
                 B1265B (Logic circuits); B1265F (Microprocessors and
                 microcomputers); B2570D (CMOS integrated circuits);
                 C5120 (Logic and switching circuits); C5135 (Digital
                 signal processing chips); C5210B (Computer-aided logic
                 design); C5230 (Digital arithmetic methods); C7410D
                 (Electronic engineering computing)",
  confsponsor =  "IEEE; EDA Assoc.; AEIA, Spain; AFCET, France; AICA,
                 Italy; Bull SA, France; CEC ESPRIT Basic Research",
  keywords =     "32 Bit; ASIC macro cell multiplier; Balanced delays;
                 CMOS; Combined bit compression tree; Compact wiring
                 structure; Complex numbers; Digital signal processing
                 ASIC chip; Floating point number representation; Shared
                 Booth encoding; Wallace tree",
  numericalindex = "Word length 3.2E+01 bit",
  thesaurus =    "Application specific integrated circuits; Cellular
                 arrays; CMOS logic circuits; Digital signal processing
                 chips; Floating point arithmetic; Integrated circuit
                 design; Logic arrays; Logic CAD; Multiplying circuits",
}


bibtype: article
filename: fparith.bib
label: Subramaniam:1993:PPP
author: Ramesh Subramaniam and Kiran Kundargi and J. Dahms
title: Programming The Pentium Processor
journal: j-DDJ
volume: 18
number: 6
pages: 34, 36, 38, 40--42
month: jun
monthnumber: 6
year: 1993
CODEN: DDJOEB
ISSN: 1044-789X OR 1044789X
bibdate: Tue Sep 03 09:15:41 1996
bibtimestamp: 1996.09.03 09:15:41 ???
fjournal: Dr. Dobb's Journal of Software Tools
acknowledgement: ack-nhfb
affiliation: Intel, Santa Clara, CA, USA
rawauthor: Ramesh Subramaniam and Kiran Kundargi and J. Dahms
rawtitle: Programming The {Pentium} Processor
abstract:
Intel's recent entry into the 32-bit microprocessor race ups the performance ante. Our authors discuss the Pentium's superscalar, pipelined architecture, focusing on floating-point code. John Dahms shares some of his experiences in writing a Pentium-aware compiler.

keywords:
32 Bit; 32-Bit microprocessor; Floating-point code; High performance architecture; Intel Pentium; Pentium-aware compiler; Programming; Superscalar pipelined architecture

thesaurus:
Computer architecture; Microprocessor chips; Microprogramming; Pipeline processing; Program compilers

rawabstract:
Intel's recent entry into the 32-bit microprocessor race ups the performance ante. Our authors discuss the Pentium's superscalar, pipelined architecture, focusing on floating-point code. John Dahms shares some of his experiences in writing a Pentium-aware compiler.

entry:
@Article{Subramaniam:1993:PPP,
  author =       "Ramesh Subramaniam and Kiran Kundargi and J. Dahms",
  title =        "Programming The {Pentium} Processor",
  journal =      j-DDJ,
  volume =       "18",
  number =       "6",
  pages =        "34, 36, 38, 40--42",
  month =        jun,
  year =         "1993",
  CODEN =        "DDJOEB",
  ISSN =         "1044-789X",
  bibdate =      "Tue Sep 03 09:15:41 1996",
  bibsource =    "http://www.ddj.com/index/author/index.htm;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 UnCover database",
  abstract =     "Intel's recent entry into the 32-bit microprocessor
                 race ups the performance ante. Our authors discuss the
                 Pentium's superscalar, pipelined architecture, focusing
                 on floating-point code. John Dahms shares some of his
                 experiences in writing a Pentium-aware compiler.",
  acknowledgement = ack-nhfb,
  affiliation =  "Intel, Santa Clara, CA, USA",
  classification = "C5130 (Microprocessor chips); C5220 (Computer
                 architecture); C6110 (Systems analysis and
                 programming); C6150C (Compilers, interpreters and other
                 processors)",
  fjournal =     "Dr. Dobb's Journal of Software Tools",
  keywords =     "32 Bit; 32-Bit microprocessor; Floating-point code;
                 High performance architecture; Intel Pentium;
                 Pentium-aware compiler; Programming; Superscalar
                 pipelined architecture",
  thesaurus =    "Computer architecture; Microprocessor chips;
                 Microprogramming; Pipeline processing; Program
                 compilers",
}


bibtype: inproceedings
filename: fparith.bib
label: Swartzlander:1993:FSC
author: Earl Swartzlander and Mary Jane Irwin and Graham Jullien
title: Foreword: 11th Symposium on Computer Arithmetic, Windsor, Ontario, Canada, June 29--July 2, 1993
crossref: Swartzlander:1993:SCA
pages: v--v
year: 1993
bibdate: Sat Nov 17 09:46:07 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.17 09:46:07 ???
keywords: ARITH-11
acknowledgement: ack-nhfb
rawauthor: Earl Swartzlander and Mary Jane Irwin and Graham Jullien
rawtitle: Foreword: {11th Symposium on Computer Arithmetic, Windsor, Ontario, Canada, June 29--July 2, 1993}
URL:
http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_contents.pdf; http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_foreword.pdf; http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_preface.pdf

entry:
@InProceedings{Swartzlander:1993:FSC,
  author =       "Earl Swartzlander and Mary Jane Irwin and Graham
                 Jullien",
  title =        "Foreword: {11th Symposium on Computer Arithmetic,
                 Windsor, Ontario, Canada, June 29--July 2, 1993}",
  crossref =     "Swartzlander:1993:SCA",
  pages =        "v--v",
  year =         "1993",
  bibdate =      "Sat Nov 17 09:46:07 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_contents.pdf;
                 http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_foreword.pdf;
                 http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_preface.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-11",
}


bibtype: inproceedings
filename: fparith.bib
label: Takagi:1993:MMA
author: N. Takagi
title: Modular Multiplication Algorithm with Triangle Addition
crossref: Swartzlander:1993:SCA
pages: 272--276
year: 1993
bibdate: Wed Nov 14 18:48:15 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.14 18:48:15 ???
URL: http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Takagi.pdf
keywords: ARITH-11
acknowledgement: ack-nhfb
rawauthor: N. Takagi
rawtitle: Modular Multiplication Algorithm with Triangle Addition
entry:
@InProceedings{Takagi:1993:MMA,
  author =       "N. Takagi",
  title =        "Modular Multiplication Algorithm with Triangle
                 Addition",
  crossref =     "Swartzlander:1993:SCA",
  pages =        "272--276",
  year =         "1993",
  bibdate =      "Wed Nov 14 18:48:15 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Takagi.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-11",
}


bibtype: article
filename: fparith.bib
label: Thompson:1993:CCQ
author: William J. Thompson
title: Cutting Corners: Quick Square Roots and Trig Functions
journal: j-COMPUT-PHYS
volume: 7
number: 1
pages: 18--??
month: jan
monthnumber: 1
year: 1993
CODEN: CPHYE2
DOI: https://doi.org/10.1063/1.4823136
ISSN: 0894-1866 (print), 1558-4208 (electronic) OR 08941866 (print), 15584208 (electronic)
ISSNL: 0894-1866 OR 08941866
bibdate: Wed Apr 10 08:45:39 MDT 2019
bibtimestamp: 2019.04.10 08:45:39 MDT
URL: https://aip.scitation.org/doi/10.1063/1.4823136
fjournal: Computers in Physics
acknowledgement: ack-nhfb
ajournal: Comput. Phys
journalURL: https://aip.scitation.org/journal/cip
rawauthor: William J. Thompson
rawtitle: Cutting Corners: Quick Square Roots and Trig Functions
bibsource:
https://www.math.utah.edu/pub/tex/bib/computphys.bib; https://www.math.utah.edu/pub/tex/bib/elefunt.bib; https://www.math.utah.edu/pub/tex/bib/fparith.bib

entry:
@Article{Thompson:1993:CCQ,
  author =       "William J. Thompson",
  title =        "Cutting Corners: Quick Square Roots and Trig
                 Functions",
  journal =      j-COMPUT-PHYS,
  volume =       "7",
  number =       "1",
  pages =        "18--??",
  month =        jan,
  year =         "1993",
  CODEN =        "CPHYE2",
  DOI =          "https://doi.org/10.1063/1.4823136",
  ISSN =         "0894-1866 (print), 1558-4208 (electronic)",
  ISSN-L =       "0894-1866",
  bibdate =      "Wed Apr 10 08:45:39 MDT 2019",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/computphys.bib;
                 https://www.math.utah.edu/pub/tex/bib/elefunt.bib;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "https://aip.scitation.org/doi/10.1063/1.4823136",
  acknowledgement = ack-nhfb,
  ajournal =     "Comput. Phys",
  fjournal =     "Computers in Physics",
  journal-URL =  "https://aip.scitation.org/journal/cip",
}


bibtype: manual
filename: fparith.bib
label: TI:1993:ITC
organization: Texas Instruments Incorporated
address: S.l
pages: iv + 15
year: 1993
bibdate: Sat Feb 24 15:01:45 MST 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.02.24 15:01:45 MST
remark: ``SCAA005'' --- back cover.
acknowledgement: ack-nhfb
title:
Interfacing TI clocked FIFOs with TI floating-point digital signal processors: first-in, first-out technology

keywords:
Computer input-output equipment.; Signal processing --- Digital techniques --- Equipment and; supplies.

rawtitle:
Interfacing {TI} clocked {FIFOs} with {TI} floating-point digital signal processors: first-in, first-out technology

entry:
@Manual{TI:1993:ITC,
  title =        "Interfacing {TI} clocked {FIFOs} with {TI}
                 floating-point digital signal processors: first-in,
                 first-out technology",
  organization = "Texas Instruments Incorporated",
  address =      "S.l",
  pages =        "iv + 15",
  year =         "1993",
  bibdate =      "Sat Feb 24 15:01:45 MST 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "Computer input-output equipment.; Signal processing
                 --- Digital techniques --- Equipment and; supplies.",
  remark =       "``SCAA005'' --- back cover.",
}


bibtype: misc
filename: fparith.bib
label: TI:1993:ITT
title: Inside technology today 32-bit floating point multi-port DSP / produced by Texas Instruments
address: Dallas, TX, USA
pages: iv + 15
year: 1993
bibdate: Sat Feb 24 15:01:45 MST 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.02.24 15:01:45 MST
note: 1 videocassette
keywords: Computer --- Circuits.; Electronic calculating machines circuits.
acknowledgement: ack-nhfb
key: TI '1993
rawnote: 1 videocassette
howpublished:
VHS format. High-speed, multi-port DSPs can be used in parallel processing applications to really enhance computation time and power. A popular 6-port floating point DSP and high speed design integration and applications are described in this tape.

rawtitle:
Inside technology today 32-bit floating point multi-port {DSP} \slash{} produced by {Texas Instruments}

entry:
@Misc{TI:1993:ITT,
  key =          "TI '1993",
  title =        "Inside technology today 32-bit floating point
                 multi-port {DSP} \slash{} produced by {Texas
                 Instruments}",
  howpublished = "VHS format. High-speed, multi-port DSPs can be used in
                 parallel processing applications to really enhance
                 computation time and power. A popular 6-port floating
                 point DSP and high speed design integration and
                 applications are described in this tape.",
  address =      "Dallas, TX, USA",
  year =         "1993",
  bibdate =      "Sat Feb 24 15:01:45 MST 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  note =         "1 videocassette",
  acknowledgement = ack-nhfb,
  keywords =     "Computer --- Circuits.; Electronic calculating
                 machines circuits.",
  publication =  "Texas Instruments Inc.",
}


bibtype: article
filename: fparith.bib
label: Timmermann:1993:GFR
author: D. Timmermann and B. Rix and B. Hosticka
journal: j-ELECTRONIK
volume: 20
pages: 142--146
year: 1993
CODEN: EKRKAR
ISSN: 0013-5658 OR 00135658
bibdate: Fri Dec 08 13:05:00 1995
bibsource: ftp://garbo.uwasa.fi/pc/doc-soft/fpbibl18.zip; https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1995.12.08 13:05:00 ???
fjournal: Elektronik
acknowledgement: ack-nj
rawauthor: D. Timmermann and B. Rix and B. Hosticka
title:
Gleitkommaprozessor fur rechenintensive Echtzeitanwendungen toenglish Floating-point Processor for Computationally Intensive Real-Time Use endtoenglish 

rawtitle:
{Gleitkommaprozessor f{\"u}r rechenintensive Echtzeitanwendungen} \toenglish {Floating-point Processor for Computationally Intensive Real-Time Use} \endtoenglish

entry:
@Article{Timmermann:1993:GFR,
  author =       "D. Timmermann and B. Rix and B. Hosticka",
  title =        "{Gleitkommaprozessor f{\"u}r rechenintensive
                 Echtzeitanwendungen} \toenglish {Floating-point
                 Processor for Computationally Intensive Real-Time Use}
                 \endtoenglish",
  journal =      j-ELECTRONIK,
  volume =       "20",
  number =       "??",
  pages =        "142--146",
  month =        "????",
  year =         "1993",
  CODEN =        "EKRKAR",
  ISSN =         "0013-5658",
  bibdate =      "Fri Dec 08 13:05:00 1995",
  bibsource =    "ftp://garbo.uwasa.fi/pc/doc-soft/fpbibl18.zip;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nj,
  fjournal =     "Elektronik",
}


bibtype: article
filename: fparith.bib
label: Tiwari:1993:NCP
author: Neeraj Tiwari and A. K. Nigam
title: A note on constructive procedure for unbiased controlled rounding
journal: j-STAT-PROB-LETT
volume: 18
number: 5
pages: 415--420
day: 2
month: dec
monthnumber: 12
year: 1993
CODEN: SPLTDC
ISSN: 0167-7152 (print), 1879-2103 (electronic) OR 01677152 (print), 18792103 (electronic)
ISSNL: 0167-7152 OR 01677152
bibdate: Sun Jun 1 11:14:48 MDT 2014
bibtimestamp: 2014.06.01 11:14:48 MDT
URL: http://www.sciencedirect.com/science/article/pii/016771529390036I
fjournal: Statistics & Probability Letters
acknowledgement: ack-nhfb
journalURL: http://www.sciencedirect.com/science/journal/01677152
rawauthor: Neeraj Tiwari and A. K. Nigam
rawtitle: A note on constructive procedure for unbiased controlled rounding
bibsource:
https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/statproblett1990.bib

entry:
@Article{Tiwari:1993:NCP,
  author =       "Neeraj Tiwari and A. K. Nigam",
  title =        "A note on constructive procedure for unbiased
                 controlled rounding",
  journal =      j-STAT-PROB-LETT,
  volume =       "18",
  number =       "5",
  pages =        "415--420",
  day =          "2",
  month =        dec,
  year =         "1993",
  CODEN =        "SPLTDC",
  ISSN =         "0167-7152 (print), 1879-2103 (electronic)",
  ISSN-L =       "0167-7152",
  bibdate =      "Sun Jun 1 11:14:48 MDT 2014",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/statproblett1990.bib",
  URL =          "http://www.sciencedirect.com/science/article/pii/016771529390036I",
  acknowledgement = ack-nhfb,
  fjournal =     "Statistics \& Probability Letters",
  journal-URL =  "http://www.sciencedirect.com/science/journal/01677152",
}


bibtype: article
filename: fparith.bib
label: Tsuji:1993:FNS
author: Kumiko Tsuji
journal: Surikaisekikenkyusho Kokyuroku
volume: 831
pages: 33--45
year: 1993
MRclass: 65G05
MRnumber: 95a:65083
bibdate: Fri Dec 8 08:24:11 1995
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1995.12.08 08:24:11 ???
acknowledgement: ack-nhfb
rawauthor: Kumiko Tsuji
title:
Floating-point number solutions in a simple linear equation with addition algorithm. Numerical calculation methods with guaranteed accuracy and their applications (Japanese) (Kyoto, 1992)

rawtitle:
Floating-point number solutions in a simple linear equation with addition algorithm. Numerical calculation methods with guaranteed accuracy and their applications ({Japanese}) ({Kyoto}, 1992)

entry:
@Article{Tsuji:1993:FNS,
  author =       "Kumiko Tsuji",
  title =        "Floating-point number solutions in a simple linear
                 equation with addition algorithm. Numerical calculation
                 methods with guaranteed accuracy and their applications
                 ({Japanese}) ({Kyoto}, 1992)",
  journal =      "S{\=u}rikaisekikenky{\=u}sho K{\=o}ky{\=u}roku",
  volume =       "831",
  pages =        "33--45",
  year =         "1993",
  MRclass =      "65G05",
  MRnumber =     "95a:65083",
  bibdate =      "Fri Dec 8 08:24:11 1995",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
}


bibtype: inproceedings
filename: fparith.bib
label: Turner:1993:CSA
author: P. R. Turner
title: Complex SLI arithmetic: Representation, algorithms and analysis
crossref: Swartzlander:1993:SCA
pages: 18--25
year: 1993
bibdate: Thu Dec 14 11:25:18 MST 1995
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1995.12.14 11:25:18 MST
URL: http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Turner.pdf
acknowledgement: ack-nhfb
affiliation: Department of Math., US Naval Acad., Annapolis, MD, USA
thesaurus: Floating point arithmetic
rawauthor: P. R. Turner
rawtitle: Complex {SLI} arithmetic: Representation, algorithms and analysis
abstract:
The extension of the SLI (symmetric level index) system to complex numbers and arithmetic is discussed. The natural form for representation of complex quantities in SLI is in the modulus-argument form, and this can be sensibly packed into a single 64-b word for the equivalent of the 32-b real SLI representation. The arithmetic algorithms prove to be very slightly more complicated than for real SLI arithmetic. The representation, the arithmetic algorithms, and the control of errors within these algorithms are described.

keywords:
ARITH-11; Arithmetic algorithms; Complex numbers; Modulus-argument form; Representation; SLI; SLI arithmetic; Symmetric level index

rawabstract:
The extension of the SLI (symmetric level index) system to complex numbers and arithmetic is discussed. The natural form for representation of complex quantities in SLI is in the modulus-argument form, and this can be sensibly packed into a single 64-b word for the equivalent of the 32-b real SLI representation. The arithmetic algorithms prove to be very slightly more complicated than for real SLI arithmetic. The representation, the arithmetic algorithms, and the control of errors within these algorithms are described.

entry:
@InProceedings{Turner:1993:CSA,
  author =       "P. R. Turner",
  title =        "Complex {SLI} arithmetic: Representation, algorithms
                 and analysis",
  crossref =     "Swartzlander:1993:SCA",
  pages =        "18--25",
  year =         "1993",
  bibdate =      "Thu Dec 14 11:25:18 MST 1995",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Turner.pdf",
  abstract =     "The extension of the SLI (symmetric level index)
                 system to complex numbers and arithmetic is discussed.
                 The natural form for representation of complex
                 quantities in SLI is in the modulus-argument form, and
                 this can be sensibly packed into a single 64-b word for
                 the equivalent of the 32-b real SLI representation. The
                 arithmetic algorithms prove to be very slightly more
                 complicated than for real SLI arithmetic. The
                 representation, the arithmetic algorithms, and the
                 control of errors within these algorithms are
                 described.",
  acknowledgement = ack-nhfb,
  affiliation =  "Department of Math., US Naval Acad., Annapolis, MD,
                 USA",
  classification = "C5230 (Digital arithmetic methods)",
  keywords =     "ARITH-11; Arithmetic algorithms; Complex numbers;
                 Modulus-argument form; Representation; SLI; SLI
                 arithmetic; Symmetric level index",
  thesaurus =    "Floating point arithmetic",
}


bibtype: article
filename: fparith.bib
label: Vassiliadis:1993:CHW
author: S. Vassiliadis and E. M. Schwarz
title: Correction to ``Hard-wired multipliers with encoded partial products''
journal: j-IEEE-TRANS-COMPUT
volume: 42
number: 1
pages: 127--127
month: jan
monthnumber: 1
year: 1993
CODEN: ITCOB4
DOI: https://doi.org/10.1109/12.192224
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Thu Jul 7 07:58:47 MDT 2011
bibtimestamp: 2011.07.07 07:58:47 MDT
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=192224
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: S. Vassiliadis and E. M. Schwarz
rawtitle: Correction to {``Hard-wired multipliers with encoded partial products''}
entry:
@Article{Vassiliadis:1993:CHW,
  author =       "S. Vassiliadis and E. M. Schwarz",
  title =        "Correction to {``Hard-wired multipliers with encoded
                 partial products''}",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "42",
  number =       "1",
  pages =        "127--127",
  month =        jan,
  year =         "1993",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/12.192224",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Thu Jul 7 07:58:47 MDT 2011",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput1990.bib",
  URL =          "http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=192224",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
}


bibtype: article
filename: fparith.bib
label: Veselic:1993:FPH
author: Kresimir Veselic and Ivan Slapnicar
title: Floating-Point Perturbations of Hermitian Matrices
journal: j-LINEAR-ALGEBRA-APPL
volume: 195
pages: 81--116
month: dec
monthnumber: 12
year: 1993
CODEN: LAAPAW
ISSN: 0024-3795 (print), 1873-1856 (electronic) OR 00243795 (print), 18731856 (electronic)
ISSNL: 0024-3795 OR 00243795
MRclass: 65F15 (15A18 15A57)
MRnumber: 94m:65066
bibdate: Sat Feb 24 15:01:45 MST 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.02.24 15:01:45 MST
fjournal: Linear Algebra and its Applications
acknowledgement: ack-nhfb
journalURL: http://www.sciencedirect.com/science/journal/00243795
rawauthor: Kre{\v{s}}imir Veseli{\'c} and Ivan Slapni{\v{c}}ar
rawtitle: Floating-Point Perturbations of {Hermitian} Matrices
entry:
@Article{Veselic:1993:FPH,
  author =       "Kre{\v{s}}imir Veseli{\'c} and Ivan Slapni{\v{c}}ar",
  title =        "Floating-Point Perturbations of {Hermitian} Matrices",
  journal =      j-LINEAR-ALGEBRA-APPL,
  volume =       "195",
  number =       "??",
  pages =        "81--116",
  month =        dec,
  year =         "1993",
  CODEN =        "LAAPAW",
  ISSN =         "0024-3795 (print), 1873-1856 (electronic)",
  ISSN-L =       "0024-3795",
  MRclass =      "65F15 (15A18 15A57)",
  MRnumber =     "94m:65066",
  bibdate =      "Sat Feb 24 15:01:45 MST 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "Linear Algebra and its Applications",
  journal-URL =  "http://www.sciencedirect.com/science/journal/00243795",
}


bibtype: article
filename: fparith.bib
label: Vignes:1993:SAR
author: J. Vignes
title: A stochastic arithmetic for reliable scientific computation
journal: j-MATH-COMP-SIM
volume: 35
number: 3
pages: 233--261
month: sep
monthnumber: 9
year: 1993
CODEN: MCSIDR
DOI: https://doi.org/10.1016/0378-4754(93)90003-D
ISSN: 0378-4754 (print), 1872-7166 (electronic) OR 03784754 (print), 18727166 (electronic)
ISSNL: 0378-4754 OR 03784754
bibdate: Thu Mar 24 20:56:34 2011
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2011.03.24 20:56:34 ???
URL: http://portal.acm.org/citation.cfm?id=165789.165792
fjournal: Mathematics and Computers in Simulation
acknowledgement: ack-nhfb
journalURL: http://www.sciencedirect.com/science/journal/03784754
rawauthor: J. Vignes
rawtitle: A stochastic arithmetic for reliable scientific computation
entry:
@Article{Vignes:1993:SAR,
  author =       "J. Vignes",
  title =        "A stochastic arithmetic for reliable scientific
                 computation",
  journal =      j-MATH-COMP-SIM,
  volume =       "35",
  number =       "3",
  pages =        "233--261",
  month =        sep,
  year =         "1993",
  CODEN =        "MCSIDR",
  DOI =          "https://doi.org/10.1016/0378-4754(93)90003-D",
  ISSN =         "0378-4754 (print), 1872-7166 (electronic)",
  ISSN-L =       "0378-4754",
  bibdate =      "Thu Mar 24 20:56:34 2011",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://portal.acm.org/citation.cfm?id=165789.165792",
  acknowledgement = ack-nhfb,
  fjournal =     "Mathematics and Computers in Simulation",
  journal-URL =  "http://www.sciencedirect.com/science/journal/03784754",
}


bibtype: article
filename: fparith.bib
label: vonNeumann:1993:FDR
author: John von Neumann
title: First Draft of a Report on the EDVAC
journal: j-IEEE-ANN-HIST-COMPUT
volume: 15
number: 4
pages: 28--75
month: oct
monthnumber: 10
year: 1993
CODEN: IAHCEX
ISSN: 1058-6180 (print), 1934-1547 (electronic) OR 10586180 (print), 19341547 (electronic)
ISSNL: 1058-6180 OR 10586180
bibdate: Thu Jul 12 06:22:55 MDT 2001
bibtimestamp: 2001.07.12 06:22:55 MDT
note: Edited and corrected by Michael D. Godfrey.
fjournal: IEEE Annals of the History of Computing
keywords: floating-point arithmetic; rounding
acknowledgement: ack-nhfb
ajournal: IEEE Ann. Hist. Comput.
journalURL: https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=85
rawauthor: John von Neumann
rawnote: Edited and corrected by Michael D. Godfrey.
rawtitle: First Draft of a Report on the {EDVAC}
bibsource:
https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/ieeeannhistcomput.bib

URL:
http://dlib.computer.org/an/books/an1993/pdf/a4027.pdf; http://www.computer.org/annals/an1993/a4027abs.htm

entry:
@Article{vonNeumann:1993:FDR,
  author =       "John von Neumann",
  title =        "First Draft of a Report on the {EDVAC}",
  journal =      j-IEEE-ANN-HIST-COMPUT,
  volume =       "15",
  number =       "4",
  pages =        "28--75",
  month =        oct # "\slash " # dec,
  year =         "1993",
  CODEN =        "IAHCEX",
  ISSN =         "1058-6180 (print), 1934-1547 (electronic)",
  ISSN-L =       "1058-6180",
  bibdate =      "Thu Jul 12 06:22:55 MDT 2001",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeeannhistcomput.bib",
  note =         "Edited and corrected by Michael D. Godfrey.",
  URL =          "http://dlib.computer.org/an/books/an1993/pdf/a4027.pdf;
                 http://www.computer.org/annals/an1993/a4027abs.htm",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Ann. Hist. Comput.",
  fjournal =     "IEEE Annals of the History of Computing",
  journal-URL =  "https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=85",
  xxpages =      "27--??",
  keywords =     "floating-point arithmetic; rounding",
}


bibtype: article
filename: fparith.bib
label: Vornberger:1993:BBM
author: Cal Vornberger
journal: j-BYTE
volume: 18
number: 13
pages: 165--166, 168
month: dec
monthnumber: 12
year: 1993
CODEN: BYTEDJ
ISSN: 0360-5280 (print), 1082-7838 (electronic) OR 03605280 (print), 10827838 (electronic)
ISSNL: 0360-5280 OR 03605280
bibdate: Thu Sep 12 16:34:03 MDT 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.09.12 16:34:03 MDT
fjournal: BYTE Magazine
acknowledgement: ack-nhfb
thesaurus: Business graphics; Desktop publishing
rawauthor: Cal Vornberger
title:
Beyond Bit Maps: Multiple floating objects deliver new power and flexibility to bit-map image processing. Micrografx Picture Publisher 4.0 and Fractal Design Painter X2 feature object layers and other useful innovations

keywords:
Bit maps; Ease of use; Fractal design painterX2; Functionality; Micrografx; Object technology; Picture Publisher 4.0

rawtitle:
Beyond Bit Maps: Multiple floating objects deliver new power and flexibility to bit-map image processing. {Micrografx Picture Publisher} 4.0 and {Fractal Design Painter X2} feature object layers and other useful innovations

entry:
@Article{Vornberger:1993:BBM,
  author =       "Cal Vornberger",
  title =        "Beyond Bit Maps: Multiple floating objects deliver new
                 power and flexibility to bit-map image processing.
                 {Micrografx Picture Publisher} 4.0 and {Fractal Design
                 Painter X2} feature object layers and other useful
                 innovations",
  journal =      j-BYTE,
  volume =       "18",
  number =       "13",
  pages =        "165--166, 168",
  month =        dec,
  year =         "1993",
  CODEN =        "BYTEDJ",
  ISSN =         "0360-5280 (print), 1082-7838 (electronic)",
  ISSN-L =       "0360-5280",
  bibdate =      "Thu Sep 12 16:34:03 MDT 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  classification = "D2010 (Business and professional); D2020 (Design and
                 graphics)",
  fjournal =     "BYTE Magazine",
  keywords =     "Bit maps; Ease of use; Fractal design painterX2;
                 Functionality; Micrografx; Object technology; Picture
                 Publisher 4.0",
  thesaurus =    "Business graphics; Desktop publishing",
}


bibtype: article
filename: fparith.bib
label: Walter:1993:SMM
author: C. D. Walter
title: Systolic modular multiplication
journal: j-IEEE-TRANS-COMPUT
volume: 42
number: 3
pages: 376--378
month: mar
monthnumber: 3
year: 1993
CODEN: ITCOB4
DOI: https://doi.org/10.1109/12.210181
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Thu Jul 7 07:58:48 MDT 2011
bibtimestamp: 2011.07.07 07:58:48 MDT
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=210181
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: C. D. Walter
rawtitle: Systolic modular multiplication
entry:
@Article{Walter:1993:SMM,
  author =       "C. D. Walter",
  title =        "Systolic modular multiplication",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "42",
  number =       "3",
  pages =        "376--378",
  month =        mar,
  year =         "1993",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/12.210181",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Thu Jul 7 07:58:48 MDT 2011",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput1990.bib",
  URL =          "http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=210181",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
}


bibtype: article
filename: fparith.bib
label: Wang:1993:SAC
author: Chin-Liang Wang and Jung-Lung Lin
title: A systolic architecture for computing inverses and divisions in finite fields $ mathrm GF(2^m) $
journal: j-IEEE-TRANS-COMPUT
volume: 42
number: 9
pages: 1141--1146
month: sep
monthnumber: 9
year: 1993
CODEN: ITCOB4
DOI: https://doi.org/10.1109/12.241603
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Thu Jul 7 07:58:51 MDT 2011
bibtimestamp: 2011.07.07 07:58:51 MDT
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=241603
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: Chin-Liang Wang and Jung-Lung Lin
rawtitle:
A systolic architecture for computing inverses and divisions in finite fields {$ \mathrm {GF}(2^m) $}

entry:
@Article{Wang:1993:SAC,
  author =       "Chin-Liang Wang and Jung-Lung Lin",
  title =        "A systolic architecture for computing inverses and
                 divisions in finite fields {$ \mathrm {GF}(2^m) $}",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "42",
  number =       "9",
  pages =        "1141--1146",
  month =        sep,
  year =         "1993",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/12.241603",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Thu Jul 7 07:58:51 MDT 2011",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput1990.bib",
  URL =          "http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=241603",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
}


bibtype: inproceedings
filename: fparith.bib
label: Wei:1993:CTA
author: D.-Y. D. Wei and J. H. Kim and T. R. N. Rao
title: Complete tests in algorithm-based fault-tolerant matrix operation on processor arrays
crossref: Lombardi:1993:PII
pages: 255--262
year: 1993
bibdate: Thu Dec 14 11:25:18 MST 1995
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1995.12.14 11:25:18 MST
acknowledgement: ack-nhfb
affiliation: Center for Adv. Comput. Studies, University of Southwestern Louisiana, Lafayette, LA, USA
rawauthor: D.-Y. D. Wei and J. H. Kim and T. R. N. Rao
rawtitle: Complete tests in algorithm-based fault-tolerant matrix operation on processor arrays
abstract:
Recently, F. T. Assaad and S. Dutt (1992) proposed the hybrid checksum test method for the floating-point matrix-matrix multiplication in ABFT environment, by which the error coverage can be greatly increased. However, the thresholded test in their approach is still not avoidable in the floating-point additions involved in matrix multiplication and the number of error detections decrease with the increase in the dynamic range of data, which is not totally satisfactory. The authors present an effective method, called concurrent floating-point checksum (CFPC) test, which provides very convincing error detection/correction capabilities for the part of floating-point addition with a minimum time latency and hardware overhead.

keywords:
concurrent floating-point checksum; error correction; error detections; fault-tolerant matrix; floating-point additions; floating-point matrix-matrix multiplication; floating-point testing; hardware overhead; hybrid checksum test; minimum time latency; processor arrays; thresholded test

thesaurus:
Computational complexity; Error correction; Error detection; Fault tolerant computing; Floating point arithmetic; Logic arrays; Logic testing; Matrix multiplication

rawabstract:
Recently, F. T. Assaad and S. Dutt (1992) proposed the hybrid checksum test method for the floating-point matrix-matrix multiplication in ABFT environment, by which the error coverage can be greatly increased. However, the thresholded test in their approach is still not avoidable in the floating-point additions involved in matrix multiplication and the number of error detections decrease with the increase in the dynamic range of data, which is not totally satisfactory. The authors present an effective method, called concurrent floating-point checksum (CFPC) test, which provides very convincing error detection/correction capabilities for the part of floating-point addition with a minimum time latency and hardware overhead.

entry:
@InProceedings{Wei:1993:CTA,
  author =       "D.-Y. D. Wei and J. H. Kim and T. R. N. Rao",
  title =        "Complete tests in algorithm-based fault-tolerant
                 matrix operation on processor arrays",
  crossref =     "Lombardi:1993:PII",
  pages =        "255--262",
  year =         "1993",
  bibdate =      "Thu Dec 14 11:25:18 MST 1995",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "Recently, F. T. Assaad and S. Dutt (1992) proposed the
                 hybrid checksum test method for the floating-point
                 matrix-matrix multiplication in ABFT environment, by
                 which the error coverage can be greatly increased.
                 However, the thresholded test in their approach is
                 still not avoidable in the floating-point additions
                 involved in matrix multiplication and the number of
                 error detections decrease with the increase in the
                 dynamic range of data, which is not totally
                 satisfactory. The authors present an effective method,
                 called concurrent floating-point checksum (CFPC) test,
                 which provides very convincing error
                 detection/correction capabilities for the part of
                 floating-point addition with a minimum time latency and
                 hardware overhead.",
  acknowledgement = ack-nhfb,
  affiliation =  "Center for Adv. Comput. Studies, University of
                 Southwestern Louisiana, Lafayette, LA, USA",
  classification = "B0290H (Linear algebra); B1265 (Digital
                 electronics); B6120B (Codes); C4140 (Linear algebra);
                 C5210 (Logic design methods); C5230 (Digital arithmetic
                 methods); C6130 (Data handling techniques)",
  keywords =     "concurrent floating-point checksum; error correction;
                 error detections; fault-tolerant matrix; floating-point
                 additions; floating-point matrix-matrix multiplication;
                 floating-point testing; hardware overhead; hybrid
                 checksum test; minimum time latency; processor arrays;
                 thresholded test",
  thesaurus =    "Computational complexity; Error correction; Error
                 detection; Fault tolerant computing; Floating point
                 arithmetic; Logic arrays; Logic testing; Matrix
                 multiplication",
}


bibtype: book
filename: fparith.bib
label: Weste:1993:PCV
author: Neil H. E. Weste and Kamran Eshraghian
title: Principles of CMOS VLSI Design: a Systems Perspective
publisher: pub-AW
address: pub-AW:adr
edition: Second
pages: xxii + 713
year: 1993
ISBN: 0-201-53376-6 OR 0201533766
ISBN13: 978-0-201-53376-7 OR 9780201533767
LCCN: TK7874 .W46 1993
bibdate: Mon Sep 16 16:32:31 2002
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2002.09.16 16:32:31 ???
acknowledgement: ack-nhfb
rawauthor: Neil H. E. Weste and Kamran Eshraghian
rawtitle: Principles of {CMOS VLSI} Design: a Systems Perspective
entry:
@Book{Weste:1993:PCV,
  author =       "Neil H. E. Weste and Kamran Eshraghian",
  title =        "Principles of {CMOS VLSI} Design: a Systems
                 Perspective",
  publisher =    pub-AW,
  address =      pub-AW:adr,
  edition =      "Second",
  pages =        "xxii + 713",
  year =         "1993",
  ISBN =         "0-201-53376-6",
  ISBN-13 =      "978-0-201-53376-7",
  LCCN =         "TK7874 .W46 1993",
  bibdate =      "Mon Sep 16 16:32:31 2002",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
}


bibtype: article
filename: fparith.bib
label: Williams:1993:BFM
author: Al Williams
title: Bit Floating-Point Math
journal: j-DDJ
volume: 18
number: 6
pages: 70--??
month: jun
monthnumber: 6
year: 1993
CODEN: DDJOEB
ISSN: 1044-789X OR 1044789X
bibdate: Sat Feb 24 15:01:45 MST 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.02.24 15:01:45 MST
fjournal: Dr. Dobb's Journal of Software Tools
acknowledgement: ack-nhfb
rawauthor: Al Williams
rawtitle: Bit Floating-Point Math
abstract:
This approach to floating-point math uses 32-bit instructions. Although Al uses the 80386 as an example, these techniques can be applied to other 32-bit processors as well.

rawabstract:
This approach to floating-point math uses 32-bit instructions. Although Al uses the 80386 as an example, these techniques can be applied to other 32-bit processors as well.

entry:
@Article{Williams:1993:BFM,
  author =       "Al Williams",
  title =        "Bit Floating-Point Math",
  journal =      j-DDJ,
  volume =       "18",
  number =       "6",
  pages =        "70--??",
  month =        jun,
  year =         "1993",
  CODEN =        "DDJOEB",
  ISSN =         "1044-789X",
  bibdate =      "Sat Feb 24 15:01:45 MST 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "This approach to floating-point math uses 32-bit
                 instructions. Although Al uses the 80386 as an example,
                 these techniques can be applied to other 32-bit
                 processors as well.",
  acknowledgement = ack-nhfb,
  fjournal =     "Dr. Dobb's Journal of Software Tools",
}


bibtype: article
filename: fparith.bib
label: Williams:1993:FM
author: Al Williams
title: 32-bit floating-point math
journal: j-DDJ
volume: 18
number: 6
pages: 70, 72, 74, 76, 80
month: jun
monthnumber: 6
year: 1993
CODEN: DDJOEB
ISSN: 1044-789X OR 1044789X
bibdate: Tue Sep 10 08:57:56 MDT 1996
bibtimestamp: 1996.09.10 08:57:56 MDT
fjournal: Dr. Dobb's Journal of Software Tools
acknowledgement: ack-nhfb
thesaurus: Digital arithmetic; Microprocessor chips
rawauthor: Al Williams
rawtitle: 32-bit floating-point math
abstract:
This approach to floating-point math uses 32-bit instructions. Although Al uses the 80386 as an example, these techniques can be applied to other 32-bit processors as well.

keywords:
32 Bit; 32-Bit instructions; 32-Bit processors; 386 Instruction set; 80386; Floating-point mathematics

entry:
@Article{Williams:1993:FM,
  author =       "Al Williams",
  title =        "32-bit floating-point math",
  journal =      j-DDJ,
  volume =       "18",
  number =       "6",
  pages =        "70, 72, 74, 76, 80",
  month =        jun,
  year =         "1993",
  CODEN =        "DDJOEB",
  ISSN =         "1044-789X",
  bibdate =      "Tue Sep 10 08:57:56 MDT 1996",
  bibsource =    "http://www.ddj.com/index/author/index.htm;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 UnCover database",
  abstract =     "This approach to floating-point math uses 32-bit
                 instructions. Although Al uses the 80386 as an example,
                 these techniques can be applied to other 32-bit
                 processors as well.",
  acknowledgement = ack-nhfb,
  classification = "C5230 (Digital arithmetic methods)",
  fjournal =     "Dr. Dobb's Journal of Software Tools",
  keywords =     "32 Bit; 32-Bit instructions; 32-Bit processors; 386
                 Instruction set; 80386; Floating-point mathematics",
  thesaurus =    "Digital arithmetic; Microprocessor chips",
}


bibtype: inproceedings
filename: fparith.bib
label: Wrzyszcz:1993:DDCa
author: A. Wrzyszcz and D. Caban and E. L. Dagless
title: Design of a discrete cosine transform circuit using the residue number system
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 584--588
year: 1993
DOI: https://doi.org/10.1109/EDAC.1993.386412
bibdate: Fri Nov 9 11:38:58 MST 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.09 11:38:58 MST
keywords: residue arithmetic; residue number system
acknowledgement: ack-nhfb
rawauthor: A. Wrzyszcz and D. Caban and E. L. Dagless
rawtitle: Design of a discrete cosine transform circuit using the residue number system
booktitle:
Proceedings. [4th] European Conference on Design Automation, 1993, with the European Event in ASIC Design

rawbooktitle:
Proceedings. [4th] European Conference on Design Automation, 1993, with the European Event in {ASIC} Design

entry:
@InProceedings{Wrzyszcz:1993:DDCa,
  author =       "A. Wrzyszcz and D. Caban and E. L. Dagless",
  booktitle =    "Proceedings. [4th] European Conference on Design
                 Automation, 1993, with the European Event in {ASIC}
                 Design",
  title =        "Design of a discrete cosine transform circuit using
                 the residue number system",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "584--588",
  year =         "1993",
  CODEN =        "????",
  DOI =          "https://doi.org/10.1109/EDAC.1993.386412",
  ISSN =         "????",
  bibdate =      "Fri Nov 9 11:38:58 MST 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "residue arithmetic; residue number system",
  summary =      "The design of an integrated circuit aimed at efficient
                 discrete cosine transform computation is presented.
                 High performance is obtained through the use of
                 pipelining and residue arithmetic. An approach to
                 high-speed modular multiplication employing \ldots{}",
}


bibtype: inproceedings
filename: fparith.bib
label: Wrzyszcz:1993:DDCb
author: A. Wrzyszcz and D. Caban and E. L. Dagless
title: Design of a discrete cosine transform circuit using the residue number system
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 584--588
year: 1993
DOI: https://doi.org/10.1109/EDAC.1993.386412
bibdate: Fri Nov 9 11:38:58 MST 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.09 11:38:58 MST
keywords: residue arithmetic; residue number system
acknowledgement: ack-nhfb
rawauthor: A. Wrzyszcz and D. Caban and E. L. Dagless
rawtitle: Design of a discrete cosine transform circuit using the residue number system
booktitle:
Proceedings. [4th] European Conference on Design Automation, 1993, with the European Event in ASIC Design

rawbooktitle:
Proceedings. [4th] European Conference on Design Automation, 1993, with the European Event in {ASIC} Design

entry:
@InProceedings{Wrzyszcz:1993:DDCb,
  author =       "A. Wrzyszcz and D. Caban and E. L. Dagless",
  booktitle =    "Proceedings. [4th] European Conference on Design
                 Automation, 1993, with the European Event in {ASIC}
                 Design",
  title =        "Design of a discrete cosine transform circuit using
                 the residue number system",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "584--588",
  year =         "1993",
  CODEN =        "????",
  DOI =          "https://doi.org/10.1109/EDAC.1993.386412",
  ISSN =         "????",
  bibdate =      "Fri Nov 9 11:38:58 MST 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "residue arithmetic; residue number system",
  summary =      "The design of an integrated circuit aimed at efficient
                 discrete cosine transform computation is presented.
                 High performance is obtained through the use of
                 pipelining and residue arithmetic. An approach to
                 high-speed modular multiplication employing \ldots{}",
}


bibtype: article
filename: fparith.bib
label: Zeng:1993:CFA
author: Chuan-Qing Zeng and Kousuke Tsukamoto and Takeo Miyata
title: Charge-balancing floating-point analogue-to-digital converter using acyclic conversion
journal: j-INT-J-ELECTRON
volume: 74
number: 5
pages: 705--??
month: may
monthnumber: 5
year: 1993
CODEN: IJELA2
ISSN: 0020-7217 (print), 1362-3060 (electronic) OR 00207217 (print), 13623060 (electronic)
ISSNL: 0020-7217 OR 00207217
bibdate: Sat Feb 24 15:01:45 MST 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.02.24 15:01:45 MST
fjournal: International Journal of Electronics Theoretical & Experimental
acknowledgement: ack-nhfb
rawauthor: Chuan-Qing Zeng and Kousuke Tsukamoto and Takeo Miyata
rawtitle: Charge-balancing floating-point analogue-to-digital converter using acyclic conversion
entry:
@Article{Zeng:1993:CFA,
  author =       "Chuan-Qing Zeng and Kousuke Tsukamoto and Takeo
                 Miyata",
  title =        "Charge-balancing floating-point analogue-to-digital
                 converter using acyclic conversion",
  journal =      j-INT-J-ELECTRON,
  volume =       "74",
  number =       "5",
  pages =        "705--??",
  month =        may,
  year =         "1993",
  CODEN =        "IJELA2",
  ISSN =         "0020-7217 (print), 1362-3060 (electronic)",
  ISSN-L =       "0020-7217",
  bibdate =      "Sat Feb 24 15:01:45 MST 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "International Journal of Electronics Theoretical \&
                 Experimental",
}


bibtype: article
filename: fparith.bib
label: Zhang:1993:EAP
author: C. N. Zhang and B. Shirazi and D. Y. Y. Yun
title: An Efficient Algorithm and Parallel Implementations for Binary and Residue Number Systems
journal: j-J-SYMBOLIC-COMP
volume: 15
number: 4
pages: 451--462
month: apr
monthnumber: 4
year: 1993
CODEN: JSYCEH
DOI: https://doi.org/10.1006/jsco.1993.1030
ISSN: 0747-7171 (print), 1095-855X (electronic) OR 07477171 (print), 1095855X (electronic)
ISSNL: 0747-7171 OR 07477171
MRclass: 65G10 (65Y05)
MRnumber: 94j:65066
MRreviewer: De Ren Wang
bibdate: Sat May 10 15:54:09 MDT 1997
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1997.05.10 15:54:09 MDT
fjournal: Journal of Symbolic Computation
acknowledgement: ack-nhfb
classcodes: C7310 (Mathematics); C7410D (Electronic engineering)
corpsource: Department of Computer Science, Regina University, Sask., Canada
journalURL: http://www.sciencedirect.com/science/journal/07477171
treatment: A Application; P Practical
rawauthor: C. N. Zhang and B. Shirazi and D. Y. Y. Yun
rawtitle: An Efficient Algorithm and Parallel Implementations for Binary and Residue Number Systems
abstract:
Arithmetic units based on a Residue Number System (RNS) are fast and simple, and therefore attractive for use in digital signal processing and symbolic computation applications. However, RNS suffers from overheads of converting numbers to and from residue system. We present a new simple and uniform computation formula for both conversion from RNS to binary and vice versa. Two levels of parallelism for VLSI hardware design of the proposed algorithm are introduced.

keywords:
algorithm; binary number systems; circuit CAD; computation; digital signal processing; parallel implementations; parallelism; residue number systems; symbol manipulation; symbolic; VLSI; VLSI hardware design

rawabstract:
Arithmetic units based on a Residue Number System (RNS) are fast and simple, and therefore attractive for use in digital signal processing and symbolic computation applications. However, RNS suffers from overheads of converting numbers to and from residue system. We present a new simple and uniform computation formula for both conversion from RNS to binary and vice versa. Two levels of parallelism for VLSI hardware design of the proposed algorithm are introduced.

entry:
@Article{Zhang:1993:EAP,
  author =       "C. N. Zhang and B. Shirazi and D. Y. Y. Yun",
  title =        "An Efficient Algorithm and Parallel Implementations
                 for Binary and Residue Number Systems",
  journal =      j-J-SYMBOLIC-COMP,
  volume =       "15",
  number =       "4",
  pages =        "451--462",
  month =        apr,
  year =         "1993",
  CODEN =        "JSYCEH",
  DOI =          "https://doi.org/10.1006/jsco.1993.1030",
  ISSN =         "0747-7171 (print), 1095-855X (electronic)",
  ISSN-L =       "0747-7171",
  MRclass =      "65G10 (65Y05)",
  MRnumber =     "94j:65066",
  MRreviewer =   "De Ren Wang",
  bibdate =      "Sat May 10 15:54:09 MDT 1997",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "Arithmetic units based on a Residue Number System
                 (RNS) are fast and simple, and therefore attractive for
                 use in digital signal processing and symbolic
                 computation applications. However, RNS suffers from
                 overheads of converting numbers to and from residue
                 system. We present a new simple and uniform computation
                 formula for both conversion from RNS to binary and vice
                 versa. Two levels of parallelism for VLSI hardware
                 design of the proposed algorithm are introduced.",
  acknowledgement = ack-nhfb,
  classcodes =   "C7310 (Mathematics); C7410D (Electronic engineering)",
  corpsource =   "Department of Computer Science, Regina University,
                 Sask., Canada",
  fjournal =     "Journal of Symbolic Computation",
  journal-URL =  "http://www.sciencedirect.com/science/journal/07477171",
  keywords =     "algorithm; binary number systems; circuit CAD;
                 computation; digital signal processing; parallel
                 implementations; parallelism; residue number systems;
                 symbol manipulation; symbolic; VLSI; VLSI hardware
                 design",
  treatment =    "A Application; P Practical",
}


bibtype: inproceedings
filename: fparith.bib
label: Zuras:1993:SML
author: D. Zuras
title: On Squaring and Multiplying Large Integers
crossref: Swartzlander:1993:SCA
pages: 260--271
year: 1993
bibdate: Sat Nov 17 09:46:07 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.17 09:46:07 ???
URL: http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Zuras.pdf
keywords: ARITH-11
acknowledgement: ack-nhfb
rawauthor: D. Zuras
rawtitle: On Squaring and Multiplying Large Integers
entry:
@InProceedings{Zuras:1993:SML,
  author =       "D. Zuras",
  title =        "On Squaring and Multiplying Large Integers",
  crossref =     "Swartzlander:1993:SCA",
  pages =        "260--271",
  year =         "1993",
  bibdate =      "Sat Nov 17 09:46:07 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith11/papers/ARITH11_Zuras.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-11",
}


bibtype: book
filename: fparith.bib
label: Zuse:1993:CML
author: Konrad Zuse
title: The Computer, My Life
publisher: pub-SV
address: pub-SV:adr
pages: 245
year: 1993
ISBN: 3-540-56453-5 (Berlin), 0-387-56453-5 (New York) OR 3540564535 (Berlin), 0387564535 (New York)
LCCN: TK7885.22.Z87 A3 1993
bibdate: Mon Nov 4 07:46:57 MST 2002
bibtimestamp: 2002.11.04 07:46:57 MST
keywords: computer engineers --- Germany --- biography; computers --- Germany --- history; Zuse, Konrad
acknowledgement: ack-nhfb
rawauthor: Konrad Zuse
rawtitle: The Computer, My Life
ISBN13:
978-3-540-56453-9 (Berlin), 978-0-387-56453-1 (New York) OR 9783540564539 (Berlin), 9780387564531 (New York)

TOC:
1: Ancestors and parents --- Early childhood memories --- School days --- Metropolis --- Abitur / 1 2: Studies (not without detours and byways) and general studies --- First inventions --- The emph Akademische Verein Motiv --- Student life between science and politics / 15 3: The early years of the computer and a digression on its prehistory --- Colleagues remember --- From mechanics to electromechanics --- Schreyer's electronic computing machine --- First outside contacts --- Thoughts on the future / 33 4: Outbreak of the war and first callup --- Structural engineer in aircraft construction --- The Z2 and Z3 --- Second callup --- emph Zuse Ingenieurburo und Apparatebau, Berlin --- The first process computer / 55 5: Origins of the Z4 --- News from the United States --- Attempt at a PhD dissertation --- Computing machine for logic operations --- Final months of the war in Berlin --- The evacuation --- Z4 completed in Gottingen --- Final war days in the Allgau / 75 6: End of the war --- Refugees in Hinterstein --- The emph Plankalkul --- The computing universe --- Automation and self-reproducing systems --- A logarithmic computing machine --- Computer development in Germany and the United States --- Move to Hopferau near Fussen --- The mill of the Patent Office / 95 7: The emph Zuse-Ingenieurburo, Hopferau bei Fussen --- First business partners: IBM and Remington Rand --- The first pipelining design --- Founding of ZUSE KG in Neukirchen --- The Z4 in the ETH in Zurich --- The computer in Europe: taking stock --- Lost opportunities --- The first German contract: the Z5 / 113 8: The partners leave --- Computing machine for land use zoning --- Electronics gains acceptance --- First funds from the emph Deutsche Forschungsgemeinschaft --- Losing one's way (and possibly a lost opportunity) --- The array processor --- Custom work for geodesics --- The Graphomat Z64 --- Growth and crisis of ZUSE KG --- The end / 133 9: Free for science (again) --- Honors --- A look to the future / 157 Appendices 1: From Forms to Program Control / 185 2: Construction of Devices / 190 3: On Computer Architecture / 210 4: On the Plan Calculus / 211 5: Lecture on the Occasion of the Award of the Honorary Doctorate by the Technical University of Berlin (Extract) / 222 6: The Computer Did Not Fall From Heaven / 225 Notes / 229 References / 231 Name Index / 235 Subject Index / 239 Computer Index / 245

rawTOC:
1: Ancestors and parents --- Early childhood memories --- School days --- Metropolis --- Abitur / 1 \\ 2: Studies (not without detours and byways) and general studies --- First inventions --- The \emph{Akademische Verein Motiv} --- Student life between science and politics / 15 \\ 3: The early years of the computer and a digression on its prehistory --- Colleagues remember --- From mechanics to electromechanics --- Schreyer's electronic computing machine --- First outside contacts --- Thoughts on the future / 33 \\ 4: Outbreak of the war and first callup --- Structural engineer in aircraft construction --- The Z2 and Z3 --- Second callup --- \emph{Zuse Ingenieurb{\"u}ro und Apparatebau, Berlin} --- The first process computer / 55 \\ 5: Origins of the Z4 --- News from the United States --- Attempt at a PhD dissertation --- Computing machine for logic operations --- Final months of the war in Berlin --- The evacuation --- Z4 completed in G{\"o}ttingen --- Final war days in the Allg{\"a}u / 75 \\ 6: End of the war --- Refugees in Hinterstein --- The \emph{Plankalk{\"u}l} --- The computing universe --- Automation and self-reproducing systems --- A logarithmic computing machine --- Computer development in Germany and the United States --- Move to Hopferau near F{\"u}ssen --- The mill of the Patent Office / 95 \\ 7: The \emph{Zuse-Ingenieurb{\"u}ro, Hopferau bei F{\"u}ssen} --- First business partners: IBM and Remington Rand --- The first pipelining design --- Founding of ZUSE KG in Neukirchen --- The Z4 in the ETH in Z{\"u}rich --- The computer in Europe: taking stock --- Lost opportunities --- The first German contract: the Z5 / 113 \\ 8: The partners leave --- Computing machine for land use zoning --- Electronics gains acceptance --- First funds from the \emph{Deutsche Forschungsgemeinschaft} --- Losing one's way (and possibly a lost opportunity) --- The array processor --- Custom work for geodesics --- The Graphomat Z64 --- Growth and crisis of ZUSE KG --- The end / 133 \\ 9: Free for science (again) --- Honors --- A look to the future / 157 \\ Appendices \\ 1: From Forms to Program Control / 185 \\ 2: Construction of Devices / 190 \\ 3: On Computer Architecture / 210 \\ 4: On the Plan Calculus / 211 \\ 5: Lecture on the Occasion of the Award of the Honorary Doctorate by the Technical University of Berlin (Extract) / 222 \\ 6: The Computer Did Not Fall From Heaven / 225 \\ Notes / 229 \\ References / 231 \\ Name Index / 235 \\ Subject Index / 239 \\ Computer Index / 245

entry:
@Book{Zuse:1993:CML,
  author =       "Konrad Zuse",
  title =        "The Computer, My Life",
  publisher =    pub-SV,
  address =      pub-SV:adr,
  pages =        "245",
  year =         "1993",
  ISBN =         "3-540-56453-5 (Berlin), 0-387-56453-5 (New York)",
  ISBN-13 =      "978-3-540-56453-9 (Berlin), 978-0-387-56453-1 (New
                 York)",
  LCCN =         "TK7885.22.Z87 A3 1993",
  bibdate =      "Mon Nov 4 07:46:57 MST 2002",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/annhistcomput.bib;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "computer engineers --- Germany --- biography;
                 computers --- Germany --- history; Zuse, Konrad",
  tableofcontents = "1: Ancestors and parents --- Early childhood
                 memories --- School days --- Metropolis --- Abitur / 1
                 \\
                 2: Studies (not without detours and byways) and general
                 studies --- First inventions --- The \emph{Akademische
                 Verein Motiv} --- Student life between science and
                 politics / 15 \\
                 3: The early years of the computer and a digression on
                 its prehistory --- Colleagues remember --- From
                 mechanics to electromechanics --- Schreyer's electronic
                 computing machine --- First outside contacts ---
                 Thoughts on the future / 33 \\
                 4: Outbreak of the war and first callup --- Structural
                 engineer in aircraft construction --- The Z2 and Z3 ---
                 Second callup --- \emph{Zuse Ingenieurb{\"u}ro und
                 Apparatebau, Berlin} --- The first process computer /
                 55 \\
                 5: Origins of the Z4 --- News from the United States
                 --- Attempt at a PhD dissertation --- Computing machine
                 for logic operations --- Final months of the war in
                 Berlin --- The evacuation --- Z4 completed in
                 G{\"o}ttingen --- Final war days in the Allg{\"a}u / 75
                 \\
                 6: End of the war --- Refugees in Hinterstein --- The
                 \emph{Plankalk{\"u}l} --- The computing universe ---
                 Automation and self-reproducing systems --- A
                 logarithmic computing machine --- Computer development
                 in Germany and the United States --- Move to Hopferau
                 near F{\"u}ssen --- The mill of the Patent Office / 95
                 \\
                 7: The \emph{Zuse-Ingenieurb{\"u}ro, Hopferau bei
                 F{\"u}ssen} --- First business partners: IBM and
                 Remington Rand --- The first pipelining design ---
                 Founding of ZUSE KG in Neukirchen --- The Z4 in the ETH
                 in Z{\"u}rich --- The computer in Europe: taking stock
                 --- Lost opportunities --- The first German contract:
                 the Z5 / 113 \\
                 8: The partners leave --- Computing machine for land
                 use zoning --- Electronics gains acceptance --- First
                 funds from the \emph{Deutsche Forschungsgemeinschaft}
                 --- Losing one's way (and possibly a lost opportunity)
                 --- The array processor --- Custom work for geodesics
                 --- The Graphomat Z64 --- Growth and crisis of ZUSE KG
                 --- The end / 133 \\
                 9: Free for science (again) --- Honors --- A look to
                 the future / 157 \\
                 Appendices \\
                 1: From Forms to Program Control / 185 \\
                 2: Construction of Devices / 190 \\
                 3: On Computer Architecture / 210 \\
                 4: On the Plan Calculus / 211 \\
                 5: Lecture on the Occasion of the Award of the Honorary
                 Doctorate by the Technical University of Berlin
                 (Extract) / 222 \\
                 6: The Computer Did Not Fall From Heaven / 225 \\
                 Notes / 229 \\
                 References / 231 \\
                 Name Index / 235 \\
                 Subject Index / 239 \\
                 Computer Index / 245",
}


bibtype: article
filename: fparith.bib
label: Agarwal:1994:EFP
author: R. C. Agarwal and F. G. Gustavson and M. Zubair
title: Exploiting functional parallelism of POWER2 to design high-performance numerical algorithms
journal: j-IBM-JRD
volume: 38
number: 5
pages: 563--576
month: sep
monthnumber: 9
year: 1994
CODEN: IBMJAE
ISSN: 0018-8646 (print), 2151-8556 (electronic) OR 00188646 (print), 21518556 (electronic)
ISSNL: 0018-8646 OR 00188646
bibdate: Tue Mar 25 14:26:59 MST 1997
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1997.03.25 14:26:59 MST
URL: http://www.almaden.ibm.com/journal/rd38-5.html#eight
fjournal: IBM Journal of Research and Development
acknowledgement: ack-nhfb
affiliation: Res. Div., IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
corpsource: Res. Div., IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=5288520
treatment: P Practical
rawauthor: R. C. Agarwal and F. G. Gustavson and M. Zubair
rawtitle: Exploiting functional parallelism of {POWER2} to design high-performance numerical algorithms
abstract:
We describe the algorithms and architecture approach to produce high-performance codes for numerically intensive computations. In this approach, for a given computation, we design algorithms so that they perform optimally when run on a target machine --- in this case, the new POWER2* machines from the RS / 6000 family of RISC processors. The algorithmic features that we emphasize are functional parallelism, cache/register blocking, algorithmic prefetching, loop unrolling, and algorithmic restructuring. The architectural features of the POWER2 machine that we describe and that lead to high performance are multiple functional units, high bandwidth between registers, cache, and memory, a large number of fixed- and floating-point registers, and a large cache and TLB (translation lookaside buffer). The paper gives two examples that illustrate how the algorithms and architectural features interplay to produce high-performance codes. They are BLAS (basic linear algebra subroutines) and narrow-band matrix routines. These routines are included in ESSL (Engineering and Scientific Subroutine Library); an overview of ESSL is also given in this paper.

keywords:
algorithmic; Algorithmic prefetching; algorithmic restructuring; Algorithmic restructuring; algorithms; and Scientific Subroutine Library; basic linear algebra; Basic linear algebra subroutines; BLAS; cache/register blocking; Cache/register blocking; computations; Engineering; Engineering and Scientific Subroutine Library; ESSL; floating-point registers; Floating-point registers; functional parallelism; Functional parallelism; high-performance codes; High-performance codes; high-performance numerical; High-performance numerical algorithms; IBM computers; loop unrolling; Loop unrolling; mathematics computing; multiple functional units; Multiple functional units; narrow-band matrix routines; Narrow-band matrix routines; numerically intensive; Numerically intensive computations; parallel algorithms; POWER2 workstations; prefetching; processors; reduced instruction set computing; RISC; RISC processors; RS/6000 family; software libraries; subroutines; translation lookaside buffer; Translation lookaside buffer; workstations

classcodes:
C7310 (Mathematics computing); C5430 (Microcomputers); C6140B (Machine-oriented languages); C6110P (Parallel programming)

thesaurus:
IBM computers; Mathematics computing; Parallel algorithms; Reduced instruction set computing; Software libraries; Workstations

rawabstract:
We describe the algorithms and architecture approach to produce high-performance codes for numerically intensive computations. In this approach, for a given computation, we design algorithms so that they perform optimally when run on a target machine --- in this case, the new POWER2* machines from the RS\slash 6000 family of RISC processors. The algorithmic features that we emphasize are functional parallelism, cache/register blocking, algorithmic prefetching, loop unrolling, and algorithmic restructuring. The architectural features of the POWER2 machine that we describe and that lead to high performance are multiple functional units, high bandwidth between registers, cache, and memory, a large number of fixed- and floating-point registers, and a large cache and TLB (translation lookaside buffer). The paper gives two examples that illustrate how the algorithms and architectural features interplay to produce high-performance codes. They are BLAS (basic linear algebra subroutines) and narrow-band matrix routines. These routines are included in ESSL (Engineering and Scientific Subroutine Library); an overview of ESSL is also given in this paper.

entry:
@Article{Agarwal:1994:EFP,
  author =       "R. C. Agarwal and F. G. Gustavson and M. Zubair",
  title =        "Exploiting functional parallelism of {POWER2} to
                 design high-performance numerical algorithms",
  journal =      j-IBM-JRD,
  volume =       "38",
  number =       "5",
  pages =        "563--576",
  month =        sep,
  year =         "1994",
  CODEN =        "IBMJAE",
  ISSN =         "0018-8646 (print), 2151-8556 (electronic)",
  ISSN-L =       "0018-8646",
  bibdate =      "Tue Mar 25 14:26:59 MST 1997",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.almaden.ibm.com/journal/rd38-5.html#eight",
  abstract =     "We describe the algorithms and architecture approach
                 to produce high-performance codes for numerically
                 intensive computations. In this approach, for a given
                 computation, we design algorithms so that they perform
                 optimally when run on a target machine --- in this
                 case, the new POWER2* machines from the RS\slash 6000
                 family of RISC processors. The algorithmic features
                 that we emphasize are functional parallelism,
                 cache/register blocking, algorithmic prefetching, loop
                 unrolling, and algorithmic restructuring. The
                 architectural features of the POWER2 machine that we
                 describe and that lead to high performance are multiple
                 functional units, high bandwidth between registers,
                 cache, and memory, a large number of fixed- and
                 floating-point registers, and a large cache and TLB
                 (translation lookaside buffer). The paper gives two
                 examples that illustrate how the algorithms and
                 architectural features interplay to produce
                 high-performance codes. They are BLAS (basic linear
                 algebra subroutines) and narrow-band matrix routines.
                 These routines are included in ESSL (Engineering and
                 Scientific Subroutine Library); an overview of ESSL is
                 also given in this paper.",
  acknowledgement = ack-nhfb,
  affiliation =  "Res. Div., IBM Thomas J. Watson Res. Center, Yorktown
                 Heights, NY, USA",
  classcodes =   "C7310 (Mathematics computing); C5430 (Microcomputers);
                 C6140B (Machine-oriented languages); C6110P (Parallel
                 programming)",
  classification = "C5430 (Microcomputers); C6110P (Parallel
                 programming); C6140B (Machine-oriented languages);
                 C7310 (Mathematics computing)",
  corpsource =   "Res. Div., IBM Thomas J. Watson Res. Center, Yorktown
                 Heights, NY, USA",
  fjournal =     "IBM Journal of Research and Development",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=5288520",
  keywords =     "algorithmic; Algorithmic prefetching; algorithmic
                 restructuring; Algorithmic restructuring; algorithms;
                 and Scientific Subroutine Library; basic linear
                 algebra; Basic linear algebra subroutines; BLAS;
                 cache/register blocking; Cache/register blocking;
                 computations; Engineering; Engineering and Scientific
                 Subroutine Library; ESSL; floating-point registers;
                 Floating-point registers; functional parallelism;
                 Functional parallelism; high-performance codes;
                 High-performance codes; high-performance numerical;
                 High-performance numerical algorithms; IBM computers;
                 loop unrolling; Loop unrolling; mathematics computing;
                 multiple functional units; Multiple functional units;
                 narrow-band matrix routines; Narrow-band matrix
                 routines; numerically intensive; Numerically intensive
                 computations; parallel algorithms; POWER2 workstations;
                 prefetching; processors; reduced instruction set
                 computing; RISC; RISC processors; RS/6000 family;
                 software libraries; subroutines; translation lookaside
                 buffer; Translation lookaside buffer; workstations",
  thesaurus =    "IBM computers; Mathematics computing; Parallel
                 algorithms; Reduced instruction set computing; Software
                 libraries; Workstations",
  treatment =    "P Practical",
}


bibtype: article
filename: fparith.bib
label: Anonymous:1994:C
author: Anonymous
title: Corrigenda
journal: j-TOMS
volume: 20
number: 4
pages: 553--553
month: dec
monthnumber: 12
year: 1994
CODEN: ACMSCU
ISSN: 0098-3500 (print), 1557-7295 (electronic) OR 00983500 (print), 15577295 (electronic)
ISSNL: 0098-3500 OR 00983500
bibdate: Tue Mar 14 16:17:03 1995
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1995.03.14 16:17:03 ???
note: See cite Hull:1994:ICE
fjournal: ACM Transactions on Mathematical Software (TOMS)
acknowledgement: ack-rfb
journalURL: https://dl.acm.org/loi/toms
rawauthor: Anonymous
rawnote: See \cite{Hull:1994:ICE}
rawtitle: Corrigenda
entry:
@Article{Anonymous:1994:C,
  author =       "Anonymous",
  title =        "Corrigenda",
  journal =      j-TOMS,
  volume =       "20",
  number =       "4",
  pages =        "553--553",
  month =        dec,
  year =         "1994",
  CODEN =        "ACMSCU",
  ISSN =         "0098-3500 (print), 1557-7295 (electronic)",
  ISSN-L =       "0098-3500",
  bibdate =      "Tue Mar 14 16:17:03 1995",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  note =         "See \cite{Hull:1994:ICE}",
  acknowledgement = ack-rfb,
  fjournal =     "ACM Transactions on Mathematical Software (TOMS)",
  journal-URL =  "https://dl.acm.org/loi/toms",
  xxURL =        "Missing from ACM Digital Library",
}


bibtype: article
filename: fparith.bib
label: Anonymous:1994:FPa
author: Anonymous
title: Floating Point
journal: j-COMPUT-AIDED-ENG
volume: 13
number: 6
pages: 65--??
month: jun
monthnumber: 6
year: 1994
CODEN: CCAEDJ
ISSN: 0733-3536 (print), 2162-1365 (electronic) OR 07333536 (print), 21621365 (electronic)
ISSNL: 0733-3536 OR 07333536
bibdate: Sat Feb 24 15:01:45 MST 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.02.24 15:01:45 MST
abstract: Interactive Analysis Presentations.
fjournal: Computer-aided engineering: CAE
acknowledgement: ack-nhfb
rawabstract: Interactive Analysis Presentations.
rawauthor: Anonymous
rawtitle: Floating Point
entry:
@Article{Anonymous:1994:FPa,
  author =       "Anonymous",
  title =        "Floating Point",
  journal =      j-COMPUT-AIDED-ENG,
  volume =       "13",
  number =       "6",
  pages =        "65--??",
  month =        jun,
  year =         "1994",
  CODEN =        "CCAEDJ",
  ISSN =         "0733-3536 (print), 2162-1365 (electronic)",
  ISSN-L =       "0733-3536",
  bibdate =      "Sat Feb 24 15:01:45 MST 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "Interactive Analysis Presentations.",
  acknowledgement = ack-nhfb,
  fjournal =     "Computer-aided engineering: CAE",
}


bibtype: article
filename: fparith.bib
label: Anonymous:1994:FPb
author: Anonymous
title: Floating Point
journal: j-COMPUT-AIDED-ENG
volume: 13
number: 7
pages: 85--??
month: jul
monthnumber: 7
year: 1994
CODEN: CCAEDJ
ISSN: 0733-3536 (print), 2162-1365 (electronic) OR 07333536 (print), 21621365 (electronic)
ISSNL: 0733-3536 OR 07333536
bibdate: Sat Feb 24 15:01:45 MST 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.02.24 15:01:45 MST
abstract: The Misplaced Value of CE.
fjournal: Computer-aided engineering: CAE
acknowledgement: ack-nhfb
rawabstract: The Misplaced Value of CE.
rawauthor: Anonymous
rawtitle: Floating Point
entry:
@Article{Anonymous:1994:FPb,
  author =       "Anonymous",
  title =        "Floating Point",
  journal =      j-COMPUT-AIDED-ENG,
  volume =       "13",
  number =       "7",
  pages =        "85--??",
  month =        jul,
  year =         "1994",
  CODEN =        "CCAEDJ",
  ISSN =         "0733-3536 (print), 2162-1365 (electronic)",
  ISSN-L =       "0733-3536",
  bibdate =      "Sat Feb 24 15:01:45 MST 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "The Misplaced Value of CE.",
  acknowledgement = ack-nhfb,
  fjournal =     "Computer-aided engineering: CAE",
}


bibtype: article
filename: fparith.bib
label: Anonymous:1994:FPc
author: Anonymous
title: Floating Point
journal: j-COMPUT-AIDED-ENG
volume: 13
number: 10
pages: 122--??
month: oct
monthnumber: 10
year: 1994
CODEN: CCAEDJ
ISSN: 0733-3536 (print), 2162-1365 (electronic) OR 07333536 (print), 21621365 (electronic)
ISSNL: 0733-3536 OR 07333536
bibdate: Sat Feb 24 15:01:45 MST 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.02.24 15:01:45 MST
abstract: Integration's Relational Dimension.
fjournal: Computer-aided engineering: CAE
acknowledgement: ack-nhfb
rawabstract: Integration's Relational Dimension.
rawauthor: Anonymous
rawtitle: Floating Point
entry:
@Article{Anonymous:1994:FPc,
  author =       "Anonymous",
  title =        "Floating Point",
  journal =      j-COMPUT-AIDED-ENG,
  volume =       "13",
  number =       "10",
  pages =        "122--??",
  month =        oct,
  year =         "1994",
  CODEN =        "CCAEDJ",
  ISSN =         "0733-3536 (print), 2162-1365 (electronic)",
  ISSN-L =       "0733-3536",
  bibdate =      "Sat Feb 24 15:01:45 MST 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "Integration's Relational Dimension.",
  acknowledgement = ack-nhfb,
  fjournal =     "Computer-aided engineering: CAE",
}


bibtype: article
filename: fparith.bib
label: Anonymous:1994:SCSa
author: Anonymous
journal: New electronics
volume: 27
number: 4
pages: 7--??
day: 1
month: apr
monthnumber: 4
year: 1994
ISSN: 0047-9624 OR 00479624
bibdate: Fri Aug 23 08:32:16 MDT 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; UnCover library database
bibtimestamp: 1996.08.23 08:32:16 MDT
acknowledgement: ack-nhfb
rawauthor: Anonymous
title:
Single chip supercomputer: Vector processing is key to high performance in floating point calculations

rawtitle:
Single chip supercomputer: Vector processing is key to high performance in floating point calculations

entry:
@Article{Anonymous:1994:SCSa,
  author =       "Anonymous",
  title =        "Single chip supercomputer: Vector processing is key to
                 high performance in floating point calculations",
  journal =      "New electronics",
  volume =       "27",
  number =       "4",
  pages =        "7--??",
  day =          "1",
  month =        apr,
  year =         "1994",
  ISSN =         "0047-9624",
  bibdate =      "Fri Aug 23 08:32:16 MDT 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 UnCover library database",
  acknowledgement = ack-nhfb,
}


bibtype: article
filename: fparith.bib
label: Anonymous:1994:SPF
author: Anonymous
title: Signal Path: Floating-point tactics
journal: j-ELECTRONIC-ENG-TIMES
number: 807
pages: 78--??
month: jul
monthnumber: 7
year: 1994
ISSN: 0192-1541 OR 01921541
bibdate: Sat Feb 24 15:01:45 MST 1996
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1996.02.24 15:01:45 MST
fjournal: Electronic engineering times
acknowledgement: ack-nhfb
rawauthor: Anonymous
rawtitle: Signal Path: Floating-point tactics
entry:
@Article{Anonymous:1994:SPF,
  author =       "Anonymous",
  title =        "Signal Path: Floating-point tactics",
  journal =      j-ELECTRONIC-ENG-TIMES,
  volume =       "??",
  number =       "807",
  pages =        "78--??",
  month =        jul,
  year =         "1994",
  ISSN =         "0192-1541",
  bibdate =      "Sat Feb 24 15:01:45 MST 1996",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "Electronic engineering times",
}


bibtype: book
filename: fparith.bib
label: Anonymous:1994:SRT
author: Anonymous
title: The Square Root of Two to 5 million digits
volume: 129
publisher: pub-PROJECT-GUTENBERG
address: pub-PROJECT-GUTENBERG:adr
pages: 78--??
year: 1994
bibdate: Sun Jan 24 10:00:27 MST 1999
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1999.01.24 10:00:27 MST
series: ser-PROJECT-GUTENBERG
URL: ftp://uiarchive.cso.uiuc.edu/pub/etext/gutenberg/etext94/2sqrt10a.zip
subject: Mathematical constants.
acknowledgement: ack-nhfb
rawauthor: Anonymous
rawtitle: The Square Root of Two to 5 million digits
entry:
@Book{Anonymous:1994:SRT,
  author =       "Anonymous",
  title =        "The Square Root of Two to 5 million digits",
  volume =       "129",
  publisher =    pub-PROJECT-GUTENBERG,
  address =      pub-PROJECT-GUTENBERG:adr,
  year =         "1994",
  bibdate =      "Sun Jan 24 10:00:27 MST 1999",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  series =       ser-PROJECT-GUTENBERG,
  URL =          "ftp://uiarchive.cso.uiuc.edu/pub/etext/gutenberg/etext94/2sqrt10a.zip",
  acknowledgement = ack-nhfb # " and " # ack-st,
  subject =      "Mathematical constants.",
  url-contents = "ZIP",
}


bibtype: book
filename: fparith.bib
label: Apple:1994:IMP
author: Apple Computers, Inc.
title: Inside Macintosh: PowerPC Numerics
publisher: pub-AW
address: pub-AW:adr
pages: xx + 300
year: 1994
ISBN: 0-201-40728-0 OR 0201407280
ISBN13: 978-0-201-40728-0 OR 9780201407280
LCCN: QA76.8.M3 I5622 1994
bibdate: Wed Sep 07 21:08:51 1994
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1994.09.07 21:08:51 ???
acknowledgement: ack-nj
rawauthor: {Apple Computers, Inc.}
rawtitle: Inside {Macintosh}: {PowerPC Numerics}
entry:
@Book{Apple:1994:IMP,
  author =       "{Apple Computers, Inc.}",
  title =        "Inside {Macintosh}: {PowerPC Numerics}",
  publisher =    pub-AW,
  address =      pub-AW:adr,
  pages =        "xx + 300",
  year =         "1994",
  ISBN =         "0-201-40728-0",
  ISBN-13 =      "978-0-201-40728-0",
  LCCN =         "QA76.8.M3 I5622 1994",
  bibdate =      "Wed Sep 07 21:08:51 1994",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  price =        "US\$28.95",
  acknowledgement = ack-nj,
}


bibtype: article
filename: fparith.bib
label: Bajard:1994:BNH
author: J.-C. Bajard and S. Kla and Jean-Michel Muller
title: BKM: a New Hardware Algorithm for Complex Elementary Functions
journal: j-IEEE-TRANS-COMPUT
volume: 43
number: 8
pages: 955--963
month: aug
monthnumber: 8
year: 1994
CODEN: ITCOB4
DOI: https://doi.org/10.1109/12.295857
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Mon May 20 06:16:49 MDT 2002
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; OCLC Proceedings database
bibtimestamp: 2002.05.20 06:16:49 MDT
fjournal: IEEE Transactions on Computers
remark: Selected revised and extended papers from ARITH'11 cite Swartzlander:1993:SCA.
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: J.-C. Bajard and S. Kla and Jean-Michel Muller
rawtitle: {BKM}: a New Hardware Algorithm for Complex Elementary Functions
entry:
@Article{Bajard:1994:BNH,
  author =       "J.-C. Bajard and S. Kla and Jean-Michel Muller",
  title =        "{BKM}: a New Hardware Algorithm for Complex Elementary
                 Functions",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "43",
  number =       "8",
  pages =        "955--963",
  month =        aug,
  year =         "1994",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/12.295857",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Mon May 20 06:16:49 MDT 2002",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 OCLC Proceedings database",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
  remark =       "Selected revised and extended papers from ARITH'11
                 \cite{Swartzlander:1993:SCA}.",
}


bibtype: article
filename: fparith.bib
label: Bajard:1994:SOL
author: J.-C. Bajard and J. Duprat and S. Kla and J.-M. Muller
title: Some Operators for On-Line Radix-2 Computations
journal: j-J-PAR-DIST-COMP
volume: 22
number: 2
pages: 336--345
month: aug
monthnumber: 8
year: 1994
CODEN: JPDCER
DOI: https://doi.org/10.1006/jpdc.1994.1093
ISSN: 0743-7315 (print), 1096-0848 (electronic) OR 07437315 (print), 10960848 (electronic)
ISSNL: 0743-7315 OR 07437315
bibdate: Thu Mar 9 09:18:55 MST 2000
bibtimestamp: 2000.03.09 09:18:55 MST
fjournal: Journal of Parallel and Distributed Computing
acknowledgement: ack-nhfb
corpsource: Lab. LIP, Ecole Normale Superieure de Lyon, France
journalURL: http://www.sciencedirect.com/science/journal/07437315
treatment: P Practical
rawauthor: J.-C. Bajard and J. Duprat and S. Kla and J.-M. Muller
rawtitle: Some Operators for On-Line Radix-2 Computations
bibsource:
http://www.idealibrary.com/servlet/useragent?func=showAllIssues&curIssueID=jpdc; https://www.math.utah.edu/pub/tex/bib/fparith.bib

URL:
http://www.idealibrary.com/links/doi/10.1006/jpdc.1994.1093/production; http://www.idealibrary.com/links/doi/10.1006/jpdc.1994.1093/production/pdf

keywords:
bit-level representation; Borrow-Save; delay; digital arithmetic; online radix-2 computations; operators; optimal online; radix-2 digits; representation

entry:
@Article{Bajard:1994:SOL,
  author =       "J.-C. Bajard and J. Duprat and S. Kla and J.-M.
                 Muller",
  title =        "Some Operators for On-Line Radix-2 Computations",
  journal =      j-J-PAR-DIST-COMP,
  volume =       "22",
  number =       "2",
  pages =        "336--345",
  month =        aug,
  year =         "1994",
  CODEN =        "JPDCER",
  DOI =          "https://doi.org/10.1006/jpdc.1994.1093",
  ISSN =         "0743-7315 (print), 1096-0848 (electronic)",
  ISSN-L =       "0743-7315",
  bibdate =      "Thu Mar 9 09:18:55 MST 2000",
  bibsource =    "http://www.idealibrary.com/servlet/useragent?func=showAllIssues&curIssueID=jpdc;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.idealibrary.com/links/doi/10.1006/jpdc.1994.1093/production;
                 http://www.idealibrary.com/links/doi/10.1006/jpdc.1994.1093/production/pdf",
  acknowledgement = ack-nhfb,
  classification = "C5230 (Digital arithmetic methods)",
  corpsource =   "Lab. LIP, Ecole Normale Superieure de Lyon, France",
  fjournal =     "Journal of Parallel and Distributed Computing",
  journal-URL =  "http://www.sciencedirect.com/science/journal/07437315",
  keywords =     "bit-level representation; Borrow-Save; delay; digital
                 arithmetic; online radix-2 computations; operators;
                 optimal online; radix-2 digits; representation",
  treatment =    "P Practical",
}


bibtype: article
filename: fparith.bib
label: Barsi:1994:TOM
author: Ferruccio Barsi and M. Cristina Pinotti
title: Time optimal mixed radix conversion for residue number applications
journal: j-COMP-J
volume: 37
number: 10
pages: 907--916
year: 1994
CODEN: CMPJA6
ISSN: 0010-4620 (print), 1460-2067 (electronic) OR 00104620 (print), 14602067 (electronic)
ISSNL: 0010-4620 OR 00104620
bibdate: Wed Jul 21 09:54:19 MDT 1999
bibtimestamp: 1999.07.21 09:54:19 MDT
URL: http://www3.oup.co.uk/computer_journal/Volume_37/Issue_10/Vol37_10.body.html#AbstractBarsi
fjournal: The Computer Journal
acknowledgement: ack-nhfb
affiliation: Dipartimento di Matematica, Perugia University, Italy
corpsource: Dipartimento di Matematica, Perugia University, Italy
journalURL: http://comjnl.oxfordjournals.org/
thesaurus: Computational complexity; Residue number systems; Table lookup; VLSI
treatment: P Practical
rawauthor: Ferruccio Barsi and M. Cristina Pinotti
rawtitle: Time optimal mixed radix conversion for residue number applications
bibsource:
http://www3.oup.co.uk/computer_journal/Volume_37/Issue_10/Vol37_10.index.html; https://www.math.utah.edu/pub/tex/bib/fparith.bib

keywords:
applications; asymptotic conversion time; Chinese Remainder Theorem; computational complexity; constructive VLSI design; Constructive VLSI design; conventional logic; Conventional logic; logic circuitry; Logic circuitry; lookup; lookup table implementations; Lookup table implementations; mixed radix; Mixed radix notation; notation; practical ECL IC; Practical ECL IC; residue integer conversion; Residue integer conversion; residue number; Residue number applications; residue number systems; residue-to-weighted system; Residue-to-weighted system asymptotic conversion time; table; time optimal mixed radix conversion; Time optimal mixed radix conversion; VLSI

classcodes:
B2570 (Semiconductor integrated circuits); C5230 (Digital arithmetic methods); C6130 (Data handling techniques); C4240C (Computational complexity)

entry:
@Article{Barsi:1994:TOM,
  author =       "Ferruccio Barsi and M. Cristina Pinotti",
  title =        "Time optimal mixed radix conversion for residue number
                 applications",
  journal =      j-COMP-J,
  volume =       "37",
  number =       "10",
  pages =        "907--916",
  month =        "????",
  year =         "1994",
  CODEN =        "CMPJA6",
  ISSN =         "0010-4620 (print), 1460-2067 (electronic)",
  ISSN-L =       "0010-4620",
  bibdate =      "Wed Jul 21 09:54:19 MDT 1999",
  bibsource =    "http://www3.oup.co.uk/computer_journal/Volume_37/Issue_10/Vol37_10.index.html;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www3.oup.co.uk/computer_journal/Volume_37/Issue_10/Vol37_10.body.html#AbstractBarsi",
  acknowledgement = ack-nhfb,
  affiliation =  "Dipartimento di Matematica, Perugia University,
                 Italy",
  author-1-adr = "Dipartimento at Matematica, Universita di Perugia, Via
                 Vanvitelli, 061OO Perugia, Italy",
  author-2-adr = "Istituto di Elaborazione dell'Informazione del CNR,
                 Via S. Maria 46, 56100 Pisa, Italy",
  classcodes =   "B2570 (Semiconductor integrated circuits); C5230
                 (Digital arithmetic methods); C6130 (Data handling
                 techniques); C4240C (Computational complexity)",
  classification = "B2570 (Semiconductor integrated circuits); C4240C
                 (Computational complexity); C5230 (Digital arithmetic
                 methods); C6130 (Data handling techniques)",
  corpsource =   "Dipartimento di Matematica, Perugia University,
                 Italy",
  fjournal =     "The Computer Journal",
  journal-URL =  "http://comjnl.oxfordjournals.org/",
  keywords =     "applications; asymptotic conversion time; Chinese
                 Remainder Theorem; computational complexity;
                 constructive VLSI design; Constructive VLSI design;
                 conventional logic; Conventional logic; logic
                 circuitry; Logic circuitry; lookup; lookup table
                 implementations; Lookup table implementations; mixed
                 radix; Mixed radix notation; notation; practical ECL
                 IC; Practical ECL IC; residue integer conversion;
                 Residue integer conversion; residue number; Residue
                 number applications; residue number systems;
                 residue-to-weighted system; Residue-to-weighted system
                 asymptotic conversion time; table; time optimal mixed
                 radix conversion; Time optimal mixed radix conversion;
                 VLSI",
  thesaurus =    "Computational complexity; Residue number systems;
                 Table lookup; VLSI",
  treatment =    "P Practical",
}


bibtype: article
filename: fparith.bib
label: Bartolucci:1994:REC
author: M. Bartolucci and G. R. Sechi
journal: j-MICROPROC-MICROPROG
volume: 40
number: 10-12
pages: 833--839
month: dec
monthnumber: 12
year: 1994
CODEN: MMICDT
ISSN: 0165-6074 (print), 1878-7061 (electronic) OR 01656074 (print), 18787061 (electronic)
ISSNL: 0165-6074 OR 01656074
bibdate: Thu Dec 14 15:33:45 1995
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1995.12.14 15:33:45 ???
note: 20th Annual Euromicro Conference. System Architecture and Integration.
fjournal: Microprocessing and Microprogramming
acknowledgement: ack-nhfb
affiliation: Istituto di Fisica Cosmica e Tecnologie Relative, CNR, Milano, Italy
thesaurus: Algebra; Error detection; Floating point arithmetic; Roundoff errors
rawauthor: M. Bartolucci and G. R. Sechi
rawnote: 20th Annual Euromicro Conference. System Architecture and Integration.
title:
Rounding error in the computation of opposite sign floating point number parametric addition: a case study

abstract:
Presents a study about rounding errors arising in the addition of opposite-sign floating-point operands. The algebraic study of the adder functionalities provides the possibility of modifying the hardware in order to measure the rounding error effect in terms of error size and incoming rate.

keywords:
Adder functionalities; Algebraic properties; Case study; Computational units; Error size; Errors detection; Errors elimination; Floating-point operands; Hardware modification; High-speed floating point operators; Incoming rate; Opposite-sign floating-point number parametric addition; Real time applications; Rounding error

rawabstract:
Presents a study about rounding errors arising in the addition of opposite-sign floating-point operands. The algebraic study of the adder functionalities provides the possibility of modifying the hardware in order to measure the rounding error effect in terms of error size and incoming rate.

rawtitle:
Rounding error in the computation of opposite sign floating point number parametric addition: a case study

entry:
@Article{Bartolucci:1994:REC,
  author =       "M. Bartolucci and G. R. Sechi",
  title =        "Rounding error in the computation of opposite sign
                 floating point number parametric addition: a case
                 study",
  journal =      j-MICROPROC-MICROPROG,
  volume =       "40",
  number =       "10-12",
  pages =        "833--839",
  month =        dec,
  year =         "1994",
  CODEN =        "MMICDT",
  ISSN =         "0165-6074 (print), 1878-7061 (electronic)",
  ISSN-L =       "0165-6074",
  bibdate =      "Thu Dec 14 15:33:45 1995",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  note =         "20th Annual Euromicro Conference. System Architecture
                 and Integration.",
  abstract =     "Presents a study about rounding errors arising in the
                 addition of opposite-sign floating-point operands. The
                 algebraic study of the adder functionalities provides
                 the possibility of modifying the hardware in order to
                 measure the rounding error effect in terms of error
                 size and incoming rate.",
  acknowledgement = ack-nhfb,
  affiliation =  "Istituto di Fisica Cosmica e Tecnologie Relative, CNR,
                 Milano, Italy",
  classification = "C1110 (Algebra); C5230 (Digital arithmetic
                 methods)",
  confdate =     "Sept. 1994",
  conflocation = "Liverpool, UK",
  fjournal =     "Microprocessing and Microprogramming",
  keywords =     "Adder functionalities; Algebraic properties; Case
                 study; Computational units; Error size; Errors
                 detection; Errors elimination; Floating-point operands;
                 Hardware modification; High-speed floating point
                 operators; Incoming rate; Opposite-sign floating-point
                 number parametric addition; Real time applications;
                 Rounding error",
  pubcountry =   "Netherlands",
  thesaurus =    "Algebra; Error detection; Floating point arithmetic;
                 Roundoff errors",
}


bibtype: article
filename: fparith.bib
label: Bauer:1994:MDS
author: F. L. Bauer
title: Multiplication and dual system
journal: j-INFORMATIK-SPEKTRUM
volume: 17
number: 4
pages: 245--250
month: aug
monthnumber: 8
year: 1994
CODEN: INSKDW
ISSN: 0170-6012 (print), 1432-122X (electronic) OR 01706012 (print), 1432122X (electronic)
ISSNL: 0170-6012 OR 01706012
bibdate: Tue Dec 12 09:29:07 MST 1995
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 1995.12.12 09:29:07 MST
fjournal: Informatik Spektrum
language: German
acknowledgement: ack-nhfb
journalURL: http://link.springer.com/journal/287
thesaurus: Digital arithmetic; History; Multiplying circuits
rawauthor: F. L. Bauer
rawtitle: Multiplication and dual system
abstract:
A history of methods of multiplication is introduced with a table showing the assignments of Greek and Hebrew letters to the units, tens and hundreds up to 900, with no zero. The ancient Egyptian method using decimal-to-binary conversion with addition of successive even multiples of the multiplicand is explained. Napier's (1617) method of `numeri locales' is described with the aid of a multiplication table for algebraic symbols each representing a different power of 2. The application of these principles in electronic computing circuits is discussed with reference to Braun's (1963) full-adder correction circuit and Wallace's (1964) cascaded half-adders. Progress from the 8*8 field multiplier chips of 1971 to the floating-point 1.2 mu m CMOS 56*56 RISC multiplier of 1989 is summarised.

keywords:
Algebraic symbols; Cascaded half-adders; decimal floating-point arithmetic; Decimal-to-binary conversion; Egyptian method; Electronic computing circuits; Floating-point; Full-adder correction circuit; Multiplication; Multiplier chips; Numeri locales; RISC

rawabstract:
A history of methods of multiplication is introduced with a table showing the assignments of Greek and Hebrew letters to the units, tens and hundreds up to 900, with no zero. The ancient Egyptian method using decimal-to-binary conversion with addition of successive even multiples of the multiplicand is explained. Napier's (1617) method of `numeri locales' is described with the aid of a multiplication table for algebraic symbols each representing a different power of 2. The application of these principles in electronic computing circuits is discussed with reference to Braun's (1963) full-adder correction circuit and Wallace's (1964) cascaded half-adders. Progress from the 8*8 field multiplier chips of 1971 to the floating-point 1.2 mu m CMOS 56*56 RISC multiplier of 1989 is summarised.

entry:
@Article{Bauer:1994:MDS,
  author =       "F. L. Bauer",
  title =        "Multiplication and dual system",
  journal =      j-INFORMATIK-SPEKTRUM,
  volume =       "17",
  number =       "4",
  pages =        "245--250",
  month =        aug,
  year =         "1994",
  CODEN =        "INSKDW",
  ISSN =         "0170-6012 (print), 1432-122X (electronic)",
  ISSN-L =       "0170-6012",
  bibdate =      "Tue Dec 12 09:29:07 MST 1995",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "A history of methods of multiplication is introduced
                 with a table showing the assignments of Greek and
                 Hebrew letters to the units, tens and hundreds up to
                 900, with no zero. The ancient Egyptian method using
                 decimal-to-binary conversion with addition of
                 successive even multiples of the multiplicand is
                 explained. Napier's (1617) method of `numeri locales'
                 is described with the aid of a multiplication table for
                 algebraic symbols each representing a different power
                 of 2. The application of these principles in electronic
                 computing circuits is discussed with reference to
                 Braun's (1963) full-adder correction circuit and
                 Wallace's (1964) cascaded half-adders. Progress from
                 the 8*8 field multiplier chips of 1971 to the
                 floating-point 1.2 mu m CMOS 56*56 RISC multiplier of
                 1989 is summarised.",
  acknowledgement = ack-nhfb,
  classification = "C5230 (Digital arithmetic methods)",
  fjournal =     "Informatik Spektrum",
  journal-URL =  "http://link.springer.com/journal/287",
  keywords =     "Algebraic symbols; Cascaded half-adders; decimal
                 floating-point arithmetic; Decimal-to-binary
                 conversion; Egyptian method; Electronic computing
                 circuits; Floating-point; Full-adder correction
                 circuit; Multiplication; Multiplier chips; Numeri
                 locales; RISC",
  language =     "German",
  pubcountry =   "Germany",
  thesaurus =    "Digital arithmetic; History; Multiplying circuits",
}


