make programs in various other systems support a few features
that are not implemented in GNU
make. The POSIX.2 standard
(IEEE Standard 1003.2-1992) which specifies
make does not
require any of these features.
makebecause of the nonmodularity of putting knowledge into
makeof the internal format of archive file symbol tables. See section Updating Archive Symbol Directories.
make; they refer to the SCCS file that corresponds to the file one would get without the `~'. For example, the suffix rule `.c~.o' would make the file `n.o' from the SCCS file `s.n.c'. For complete coverage, a whole series of such suffix rules is required. See section Old-Fashioned Suffix Rules. In GNU
make, this entire series of cases is handled by two pattern rules for extraction from SCCS, in combination with the general feature of rule chaining. See section Chains of Implicit Rules.
make, the string `$$@' has the strange meaning that, in the dependencies of a rule with multiple targets, it stands for the particular target that is being processed. This is not defined in GNU
makebecause `$$' should always stand for an ordinary `$'. It is possible to get this functionality through the use of static pattern rules (see section Static Pattern Rules). The System V
$(targets): $$@.o lib.acan be replaced with the GNU
makestatic pattern rule:
$(targets): %: %.o lib.a
make, files found by
VPATHsearch (see section Searching Directories for Dependencies) have their names changed inside command strings. We feel it is much cleaner to always use automatic variables and thus make this feature obsolete.
makes, the automatic variable
$*appearing in the dependencies of a rule has the amazingly strange "feature" of expanding to the full name of the target of that rule. We cannot imagine what went on in the minds of Unix
makedevelopers to do this; it is utterly inconsistent with the normal definition of
makes, implicit rule search (see section Using Implicit Rules) is apparently done for all targets, not just those without commands. This means you can do:
foo.o: cc -c foo.cand Unix
makewill intuit that `foo.o' depends on `foo.c'. We feel that such usage is broken. The dependency properties of
makeare well-defined (for GNU
make, at least), and doing such a thing simply does not fit the model.
makedoes not include any built-in implicit rules for compiling or preprocessing EFL programs. If we hear of anyone who is using EFL, we will gladly add them.
make, a suffix rule can be specified with no commands, and it is treated as if it had empty commands (see section Using Empty Commands). For example:
.c.a:will override the built-in `.c.a' suffix rule. We feel that it is cleaner for a rule without commands to always simply add to the dependency list for the target. The above example can be easily rewritten to get the desired behavior in GNU
makeinvoke the shell with the `-e' flag, except under `-k' (see section Testing the Compilation of a Program). The `-e' flag tells the shell to exit as soon as any program it runs returns a nonzero status. We feel it is cleaner to write each shell command line to stand on its own and not require this special treatment.